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Multi-class

  • SVMmulticlass: Multi-class classification. Learns to predict one of k mutually exclusive classes. Th

    SVMmulticlass: Multi-class classification. Learns to predict one of k mutually exclusive classes. This is probably the simplest possible instance of SVMstruct and serves as a tutorial example of how to use the programming interface.

    标签: classification SVMmulticlass Multi-class exclusive

    上传时间: 2013-12-26

    上传用户:稀世之宝039

  • Multi-threaded Client/Server Socket Class

    Multi-threaded Client/Server Socket Class

    标签: Multi-threaded Client Server Socket

    上传时间: 2014-01-03

    上传用户:xmsmh

  • Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

      中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    标签: UltraScale Xilinx 架构

    上传时间: 2013-11-13

    上传用户:瓦力瓦力hong

  • Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

      中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    标签: UltraScale Xilinx 架构

    上传时间: 2013-11-21

    上传用户:wxqman

  • multi-line Adjunct Communication Server

    multi-line Adjunct Communication Server

    标签: Communication multi-line Adjunct Server

    上传时间: 2015-01-03

    上传用户:784533221

  • 多线程 ( Multi-Thread ) RS232 串行口通讯控件 ( 1.82 版

    多线程 ( Multi-Thread ) RS232 串行口通讯控件 ( 1.82 版,无源码 Delphi 3.0/4.0/5.0 版适用 ),作者: Varian Software Services NL。

    标签: Multi-Thread 1.82 232 RS

    上传时间: 2013-12-11

    上传用户:2525775

  • PowerFish is a class library, intended to provide a broad functionality base for any application. Al

    PowerFish is a class library, intended to provide a broad functionality base for any application. Although the focus is on game and demo development. PowerFish是一个类库,旨在为应用程序提供一个广泛的功能基础,虽然其重点是在游戏和演示开发。

    标签: functionality application PowerFish intended

    上传时间: 2013-11-28

    上传用户:2467478207

  • SnackAmp is a powerful multi-platform audio music (mp3, ogg ,wav, streams ...) player and organizer

    SnackAmp is a powerful multi-platform audio music (mp3, ogg ,wav, streams ...) player and organizer for large music collections. Manage your entire collection, including ID3 tagging and auto-playlisting. Integrated web server for remote control/streaming

    标签: multi-platform organizer SnackAmp powerful

    上传时间: 2013-12-22

    上传用户:3到15

  • java class文件介绍

    java class文件介绍

    标签: class java

    上传时间: 2014-01-06

    上传用户:songnanhua

  • 反编译class文件工具 yzwang@lntelecom.com

    反编译class文件工具 yzwang@lntelecom.com

    标签: lntelecom yzwang class com

    上传时间: 2013-11-27

    上传用户:zhouli