Module-based

This function synthesizes a (speech) signal based on a LPC (linear- ％ predictive coding) model of t

This function synthesizes a (speech) signal based on a LPC (linear- ％ predictive coding) model of the signal.

标签： synthesizes predictive function coding

上传时间： 2013-12-19

上传用户：dbs012280
DSP-based positioning data GPRMC extraction, NMEA-0183 data format and understanding of the basic wo

DSP-based positioning data GPRMC extraction, NMEA-0183 data format and understanding of the basic working principle of GPS

标签： data understanding positioning extraction

上传时间： 2013-12-19

上传用户：helmos
MTK based mobile ROM firmware editor

MTK based mobile ROM firmware editor

标签： firmware mobile editor based

上传时间： 2013-12-23

上传用户：大三三
In term project, we will take the baseline JPEG codec in ARM-based platform system as an example to

In term project, we will take the baseline JPEG codec in ARM-based platform system as an example to practice the design flow in SoC. We divide the project into three parts, and the goal of each part is described as follow. Part I: Design a baseline JPEG software codec in C/C++ and port it to ARM core,(ARM7TDMI, ARM720T, or ARM922T.) Part II: Make use of virtual prototype to integrate/verify the hardware and software. Part III: Verify your soft IP in target environment.

标签： ARM-based baseline platform project

上传时间： 2017-02-15

上传用户：363186
a c example of dds module

a c example of dds module

标签： example module dds of

上传时间： 2014-01-24

上传用户：cc1015285075
A tutorial and open source code for finding edges and corners based on the filters used in primary v

A tutorial and open source code for finding edges and corners based on the filters used in primary visual cortex.

标签： and tutorial finding corners

上传时间： 2013-12-24

上传用户：qb1993225
Xilinx clock module design

Xilinx clock module design

标签： Xilinx module design clock

上传时间： 2013-12-31

上传用户：qoovoop
Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports –

Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports – Data Types – Assigning Values and Numbers – Operators – Behavioral Modeling • Continuous Assignments • Procedural Blocks – Structural Modeling n Summary: Verilog Environment

标签： Verilog Components Structure Overview

上传时间： 2017-02-18

上传用户：xinyuzhiqiwuwu
Hardware and firmware for a DSP based digital audio MP3 player with USB pen drive funtionality, usin

Hardware and firmware for a DSP based digital audio MP3 player with USB pen drive funtionality, using a 16-bit fixed point Texas Instruments TMS320 C55x DSP and CompactFlash card. This is an open source and open hardware MP3 player project.

标签： funtionality Hardware firmware digital

上传时间： 2017-02-19

上传用户：bibirnovis
a molecular graph kernel based on iterative graph similarity and optimal assignments

a molecular graph kernel based on iterative graph similarity and optimal assignments

标签： graph assignments similarity molecular

上传时间： 2017-02-20

上传用户：阿四AIR