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Low-noise

  • Create a 1-Wire Master with Xilinx PicoBlaze

    Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.

    标签: PicoBlaze Create Master Xilinx

    上传时间: 2013-11-12

    上传用户:大三三

  • Analog Solutions for Altera FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-gates cells called complexprogrammable logic devices (CPLDs)or they can be high-density devicesbased on SRAM look-up tables (LUTs)

    标签: Solutions Analog Altera FPGAs

    上传时间: 2013-10-27

    上传用户:fredguo

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    标签: Solutions Analog Xilinx FPGAs

    上传时间: 2013-11-07

    上传用户:suicone

  • XAPP098 - Spartan FPGA低成本、高效率串行配置

    This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.

    标签: Spartan XAPP FPGA 098

    上传时间: 2013-11-01

    上传用户:wojiaohs

  • WP264-在数字视频应用中使用CPLD

      The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blocks use a PLA configuration that allowsall product terms to be routed and shared among any of the macrocells of the functionblock.

    标签: CPLD 264 WP 数字

    上传时间: 2013-11-03

    上传用户:1037540470

  • WP312-Xilinx新一代28nm FPGA技术简介

    Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.

    标签: Xilinx FPGA 312 WP

    上传时间: 2013-12-07

    上传用户:bruce

  • WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

    WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    标签: 369 WP 扩展式 处理平台

    上传时间: 2013-10-18

    上传用户:cursor

  • 基于FPGA的光纤光栅解调系统的研究

     波长信号的解调是实现光纤光栅传感网络的关键,基于现有的光纤光栅传感器解调方法,提出一种基于FPGA的双匹配光纤光栅解调方法,此系统是一种高速率、高精度、低成本的解调系统,并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计,综合考虑系统的解调精度和FPGA的处理速度给出了基于拉格朗日的曲线拟合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    标签: FPGA 光纤光栅 解调系统

    上传时间: 2013-10-10

    上传用户:zxc23456789

  • 高速电路传输线效应分析与处理

    随着系统设计复杂性和集成度的大规模提高,电子系统设计师们正在从事100MHZ以上的电路设计,总线的工作频率也已经达到或者超过50MHZ,有一大部分甚至超过100MHZ。目前约80% 的设计的时钟频率超过50MHz,将近50% 以上的设计主频超过120MHz,有20%甚至超过500M。当系统工作在50MHz时,将产生传输线效应和信号的完整性问题;而当系统时钟达到120MHz时,除非使用高速电路设计知识,否则基于传统方法设计的PCB将无法工作。因此,高速电路信号质量仿真已经成为电子系统设计师必须采取的设计手段。只有通过高速电路仿真和先进的物理设计软件,才能实现设计过程的可控性。传输线效应基于上述定义的传输线模型,归纳起来,传输线会对整个电路设计带来以下效应。 · 反射信号Reflected signals · 延时和时序错误Delay & Timing errors · 过冲(上冲/下冲)Overshoot/Undershoot · 串扰Induced Noise (or crosstalk) · 电磁辐射EMI radiation

    标签: 高速电路 传输线 效应分析

    上传时间: 2013-11-05

    上传用户:tzrdcaabb

  • 电源完整性分析应对高端PCB系统设计挑战

    印刷电路板(PCB)设计解决方案市场和技术领军企业Mentor Graphics(Mentor Graphics)宣布推出HyperLynx® PI(电源完整性)产品,满足业内高端设计者对于高性能电子产品的需求。HyperLynx PI产品不仅提供简单易学、操作便捷,又精确的分析,让团队成员能够设计可行的电源供应系统;同时缩短设计周期,减少原型生成、重复制造,也相应降低产品成本。随着当今各种高性能/高密度/高脚数集成电路的出现,传输系统的设计越来越需要工程师与布局设计人员的紧密合作,以确保能够透过众多PCB电源与接地结构,为IC提供纯净、充足的电力。配合先前推出的HyperLynx信号完整性(SI)分析和确认产品组件,Mentor Graphics目前为用户提供的高性能电子产品设计堪称业内最全面最具实用性的解决方案。“我们拥有非常高端的用户,受到高性能集成电路多重电压等级和电源要求的驱使,需要在一个单一的PCB中设计30余套电力供应结构。”Mentor Graphics副总裁兼系统设计事业部总经理Henry Potts表示。“上述结构的设计需要快速而准 确的直流压降(DC Power Drop)和电源杂讯(Power Noise)分析。拥有了精确的分析信息,电源与接地层结构和解藕电容数(de-coupling capacitor number)以及位置都可以决定,得以避免过于保守的设计和高昂的产品成本。”

    标签: PCB 电源完整性 高端

    上传时间: 2013-10-31

    上传用户:ljd123456