Vmlab是AVR系列单片机的一个纯软件模拟仿真工具。 从V3.12开始，它变成了免费的版本。Vmlab还能仿真ST62系列的单片机。
上传时间： 2014-12-31
上传用户：啊飒飒大师的
本书针对AVR系列单片机,详细介绍了单片机的结构原理、指令系统、内部资源和外部扩展功能等内容。
上传时间： 2013-10-23
上传用户：sssnaxie
IAR安装指南和使用说明。
上传时间： 2014-12-31
上传用户：ginani
for 51 for arm
上传时间： 2013-10-10
上传用户：xiaoyuer
TKScope仿真AVR驱动程序 AVR Studio环境
上传时间： 2013-11-21
上传用户：shus521
IAR安装指南和使用说明。
上传时间： 2013-10-28
上传用户：maricle
for 51 for arm
上传时间： 2013-11-14
上传用户：huql11633
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
标签： Considerations Guidelines and Design
上传时间： 2013-11-09
上传用户：ls530720646
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
标签： Efficient Verilog Digital Coding
上传时间： 2013-11-23
上传用户：我干你啊
本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.
标签： Synthesis Machine Coding Styles
上传时间： 2013-10-12
上传用户：sardinescn
