Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
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Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
This book provides a complete intermediate-level discussion of microcontroller programming using the C programming lang...
TTCAN 是基于CAN 的时间触发的高层协议,具有确定性行为,因而适用于安全相关的场合。本文首先从参照时间、基本周期、系统信息阵、网络时间单元和全局时间五个方面对TTCAN 协议进行分析,其后讲解了
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Application of Hyperspectral/High Resolution Remote Sensing in Vegetation and Wetland
Interfacing AD7276 High-Speed Data Converters to ADSP-BF535 Blackfin Processors
High Definition Audio Bus Specification Rev 1.0, design change notes 2006.
High Definition Audio Bus Specification Rev 1.0, design change notes, 2007.7
ISO/IEC13239,Information technology-Telecommunications and information exchange between systems-High level data link con...