Harvard教授Gray所写的统计信号处理
上传时间： 2015-02-03
上传用户：小草123
几款单片机的原理介绍 主要单片机的介绍1. ATMEL公司的AVR单片机,是增强型RISC内载Flash的单片机,芯片上的Flash存储器附在用户的产品中,可随时编程,再编程,使用户的产品设计容易,更新换代方便.AVR单片机采用增强的RISC结构,使其具有高速处理能力,在一个时钟周期内可执行复杂的指令,每MHz可实现1MIPS的处理能力.AVR单片机工作电压为2.7~6.0V,可以实现耗电最优化.AVR的单片机广泛应用于计算机外部设备,工业实时控制,仪器仪表,通讯设备,家用电器,宇航设备等各个领域. 2. Motorola单片机: Motorola是世界上最大的单片机厂商.从M6800开始,开发了广泛的品种,4位,8位,16位32位的单片机都能生产,其中典型的代表有:8位机M6805,M68HC05系列,8位增强型M68HC11,M68HC12 , 16位机M68HC16, 32位机M683XX. Motorola单片机的特点之一是在同样的速度下所用的时钟频率较Intel类单片机低得多,因而使得高频噪声低,抗干扰能力强,更适合于工控领域及恶劣的环境 . 3. MicroChip单片机: MicroChip单片机的主要产品是PIC 16C系列和17C系列8位单片机,CPU采用RISC结构,分别仅有33,35,58条指令,采用Harvard双总线结构,运行速度快,低工作电压,低功耗,较大的输入输出直接驱动能力,价格低,一次性编程,小体积. 适用于用量大,档次低,价格敏感的产品.在办公自动化设备,消费电子产品,电讯通信,智能仪器仪表,汽车电子,金融电子,工业控制不同领域都有广泛的应用,PIC系列单片机在世界单片机市场份额排名中逐年提高.发展非常迅速.实达高奇电子科技有限公司: www.goldenchip.com.cn 代理PIC系列单片机.
标签： 单片机
上传时间： 2014-12-27
上传用户：凤临西北
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
上传时间： 2014-12-30
上传用户：zhuoying119
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
上传时间： 2013-10-28
上传用户：15501536189
The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. These processors also provide an arithmetic logic unit (ALU) that has a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families also provide a highly specialized instruction set, which is the basis of the operational flexibility and speed of these DSPs.
标签： TMS 320 fixed-point processor
上传时间： 2013-12-27
上传用户：宋桃子
The NCTUns network simulator and emulator is developed at NCTU, Taiwan. Its predecessor is the Harvard network simulator (invented by Prof. S.Y. Wang in 1999). By using a novel simulation methodology, it can do several tasks that traditional network simulators cannot easily do.
标签： predecessor developed simulator emulator
上传时间： 2014-12-01
上传用户：txfyddz
pccard driver s3c2440.The S3C2440A offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length.
标签： outstanding S3C2440A features pccard
上传时间： 2013-12-23
上传用户：lizhen9880
