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FULL-state-feedback

  • 支持USB PS2 UART SPI CRC功能的凌阳8位单

    1、 支持USB 1.1通讯协议;2、 支持高速(Full Speed、12Mbps )和低速(Low Speed、1.5Mbps )传输;3、 6MHz晶体,锁相环PLL振荡器提供高速、低速所需时钟源;4、 支持3个端口(endpoint),可独立编程为IN 或 OUT端口。5、 PS/2:支持PS/2协议(eg.鼠标),与USB复用。

    标签: UART USB PS2 CRC

    上传时间: 2013-11-03

    上传用户:hbsunhui

  • X-tal oscillators on 8-bit mic

    <Almost since the introduction of microcontrollers as electronic components there always has been an oscillatorcircuit on the device to make it work. From application point of view only some external components wererequired to make it work. However, to make sure that it will always work required more effort. This report is basedon feedback from the market from customers applying 8-bit mircrocontrollers.>

    标签: oscillators X-tal bit mic

    上传时间: 2013-11-12

    上传用户:穿着衣服的大卫

  • PCA9544A 4channel I2C multiple

    The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.

    标签: 4channel multiple 9544A 9544

    上传时间: 2014-12-28

    上传用户:潜水的三贡

  • PCA9549 Octal bus switch with

    The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.

    标签: switch Octal 9549 with

    上传时间: 2014-11-22

    上传用户:xcy122677

  • PCA9548A 8 channel I2C bus swi

    The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.

    标签: channel 9548A 9548 PCA

    上传时间: 2013-10-13

    上传用户:bakdesec

  • 8-bit I2C-bus and SMBus IO port with reset

    The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.

    标签: C-bus SMBus reset port

    上传时间: 2014-01-18

    上传用户:bs2005

  • KEIL RTX51实时操作系统中文版

    KEIL RTX51实时操作系统中文版:RTX51是一个适用于8051 家族的实时多任务操作系统。RTX51使复杂的系统和软件设计以及有时间限制的工程开发变得简单。RTX51是一个强大的工具,它可以在单个CPU上管理几个作业(任务)。RTX51有两种不同的版本。 RTX51 Full 允许4个优先权任务的循环和切换,并且还能并行的利用中断功能。RTX51 支持信号传递,以及与系统邮箱和信号量进行消息传递。RTX51的os_wait 函数可以等以 下事件:中断、时间到、来自任务或中断的信号、来自任务或中断的消息、信号量。 RTX51 Tiny 是RTX51 Full 的一个子集。RTX51 Tiny 可以很容易的运行在没有扩展外 部存储器的单片机系统上。但是,使用RTX51 Tiny 的程序可以访问外部存储器。RTX51 Tiny允许循环任务切换,并且支持信号传递,还能并行的利用中断功能。RTX51 Tiny 的os_wait函数可以等待以下事件:时间到、时间间隔、来自任务或者中断的信号。 本章节以后的部分用RTX-51 来指代RTX-51 Full 和RTX-51 Tiny。在两者之间不同的 地方会加以说明。

    标签: KEIL RTX 51 实时操作系统

    上传时间: 2013-11-25

    上传用户:axin881314

  • 基于DSP的ATV-ATT中控系统设计

    设计一种应用于某全地形ATV车载武器装置中的中控系统,该系统设计是以TMS320F2812型DSP为核心,采用模块化设计思想,对其硬件部分进行系统设计,能够完成对武器装置高低、回转方向的运动控制,实现静止或行进状态中对目标物的测距,自动瞄准以及按既定发射模式发射弹丸和各项安全性能检测等功能。通过编制相应的软件,对其进行系统调试,验证了该设计运行稳定。 Abstract:  A central control system applied to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core, uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment, rotation direction, to achieve a state of static or moving objects on the target ranging, auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate software and to carry out system testing to verify the stability of this design and operation.

    标签: ATV-ATT DSP 中控系统

    上传时间: 2013-11-02

    上传用户:jshailingzzh

  • XAPP806 -决定DDR反馈时钟的最佳DCM相移

    This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.

    标签: XAPP 806 DDR DCM

    上传时间: 2013-10-15

    上传用户:euroford

  • WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

    WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    标签: 369 WP 扩展式 处理平台

    上传时间: 2013-10-22

    上传用户:685