源码文件
DE2_Default ----------- This design is the initial design when the board is powered-up. It increments a counter and displays t…
FPGA Design 源代码
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源码文件
(ExpressProject "Design1" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Librar…
源码文件
Release 6.3i Map G.35 Xilinx Mapping Report File for Design 'play' Design Information ------------------ Command Line : D:/Xili…
源码文件
DE2_Tv ------ This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such…
源码文件
DE2_Default ----------- This design is the initial design when the board is powered-up. It increments a counter and displays t…
源码文件
DE2_Tv ------ This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such…
源码文件
ALSO AVAILABLE IN PAPERBACK Design Patterns: Elements of Reusable Object-Oriented Software Erich Gamma, Richard Helm, Ralph…
源码文件
ALSO AVAILABLE IN PAPERBACK Design Patterns: Elements of Reusable Object-Oriented Software Erich Gamma, Richard Helm, Ralph…
源码文件
Design: 18:03, 2005年11月4日 Design: Opening design "D:\VHDL_EXERCISE\Active_hdl\homework\hw3\hw3.adf" ELBREAD: Elaboration process…
源码文件
Release 6.3i Map G.35 Xilinx Mapping Report File for Design 'dvd100k' Design Information ------------------ Command Line : E:/X…