这个设计是使用Virtex-4实现DDR的控制器的
这个设计是使用Virtex-4实现DDR的控制器的，设计分为三个主要模块：Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR SDRAM Controller,当然还有测试模块。...
FIFOs技术资料
📦 资源总数：15
💻 源代码：292
🔥 FIFOs热门资料
查看全部15个资源 »Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.
Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.Enhancements include a wider supported operating f...
The first task at hand is to set up the endpoints appropriately for this example. The following code
The first task at hand is to set up the endpoints appropriately for this example. The following code switches the CPU clock speed to 48 MHz (since at...
XAPP807-封装最小的三态以太网MAC处理引擎
The Tri-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded network processing engine based on the PowerPC™ 40...
si4463完整DEMO板原理图PCB
SILABS新推出EZradioPRO系列RFIC:SI4463完整DEMO板的开发包下载. 里面压缩了4个文件。PCB图、原理图、DEMO代码。 PCB图、原理图、DEMO程序 ,适合长远距离的无线数据传输应用.其发射功率+20dbm,接收灵敏度-116dbm,通讯距离2000米. SI44...
💻 FIFOs源代码
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