.NET平台下专题地图实现的C#代码 private void 点密度图ToolStripMenuItem_Click(object sender, EventArgs e) { //获取当前图层 ，并把它设置成IGeoFeatureLayer的实例 IMap pMap = axMapControl1.Map ILayer pLayer = pMap.get_Layer(0) as IFeatureLayer IFeatureLayer pFeatureLayer = pLayer as IFeatureLayer IGeoFeatureLayer pGeoFeatureLayer = pLayer as IGeoFeatureLayer //获取图层上的feature IFeatureClass pFeatureClass = pFeatureLayer.FeatureClass IFeatureCursor pFeatureCursor = pFeatureClass.Search(null, false) IFeature pFeature = pFeatureCursor.NextFeature()
标签： ToolStripMenuItem_Click EventArgs private object
上传时间： 2013-11-27
上传用户：xlcky
1)自选存储结构,输入含n个顶点（用字符表示顶点）和e 条边的图G； (2)求每个顶点的度,输出结果； (3)指定任意顶点x为初始顶点,对图G作DFS遍历,输出DFS 顶点序列(提示:使用一个栈实现DFS)； (4)指定任意顶点x为初始顶点,对图G作BFS遍历,输出BFS 顶点序列(提示:使用一个队列实现BFS)； (5)输入顶点x,查找图G:若存在含x的顶点,则删除该结点及 与之相关连的边,并作DFS遍历(执行操作3)；否则输出信 息“无x”； (6)判断图G是否是连通图，输出信息“YES”/“NO”； (7)如果选用的存储结构是邻接矩阵,则用邻接矩阵的信息生 成图G的邻接表,即复制图G,然再执行操作(2)；反之亦然。
上传时间： 2013-12-26
上传用户：123456wh
Enterprise Resource Planning (ERP) Implementing Strategy and Model
标签： Implementing Enterprise Resource Planning
上传时间： 2017-02-08
上传用户：klin3139
This function synthesizes a (speech) signal based on a LPC (linear- ％ predictive coding) model of the signal.
标签： synthesizes predictive function coding
上传时间： 2013-12-19
上传用户：dbs012280
LCD driver CMC-CG1N0298DFSW-W-E CSTN 128*160
标签： DFSW-W-E CMC-CG driver 0298
上传时间： 2013-12-10
上传用户：6546544
一个学习E语言的最好教程,内容详细,入门者看最合适.是CHM格式的,方便观看.另找MFC从入门到精通的CHM格式的,有的朋友请联系,邮箱:vbkyweb@yahoo.com.cn感谢
上传时间： 2017-02-12
上传用户：lijianyu172
E语言4.11版本，破解补丁，需要的用户尽快下载哦。
上传时间： 2017-02-16
上传用户：qq1604324866
c038539_ISO_IEC_14496-12_2004(E)--mpeg4标准参考资料
上传时间： 2017-02-17
上传用户：dapangxie
Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports – Data Types – Assigning Values and Numbers – Operators – Behavioral Modeling • Continuous Assignments • Procedural Blocks – Structural Modeling n Summary: Verilog Environment
标签： Verilog Components Structure Overview
上传时间： 2017-02-18
上传用户：xinyuzhiqiwuwu
The Synthetic PIC Verion 1.1 This a VHDL synthesizable model of a simple PIC 16C5x microcontroller. It is not, and is not intended as, a high fidelity circuit simulation. This package includes the following files. Note that the license agreement is stated in the main VHDL file, PICCPU.VHD and common questions are answered in the file SYNTHPIC.TXT Files: README.TXT This file.. SYNTHPIC.TXT Questions and Answers PICCPU.VHD Main processor VHDL file PICALU.VHD ALU for the PICCPU PICREGS.VHD Data memory PICROM.VHD Program memory (created by HEX2VHDL utility) PICTEST.VHD Simple test bench I used to do testing (optional) PICTEST.CMD My Viewlogic ViewSim command file (again, optional) TEST1.ASM First program I assembled and ran on it. TEST2.ASM Another test program.. TEST3.ASM Yet another.. TEST4.ASM Yet another.. TEST5.ASM Yet another.. TEST6.ASM Yet another.. HEX2VHDL.CPP Utility for converting
标签： synthesizable microcontro Synthetic PIC
上传时间： 2013-12-22
上传用户：妄想演绎师
