低密度校验码（LDPC，Low Density Parity Check Code）是一种性能接近香农极限的信道编码，已被广泛地采用到各种无线通信领域标准中，包括我国的数字电视地面传输标准、欧洲第二代卫星数字视频广播标准（DVB-S2，Digital Video Broadcasting-Satellite 2）、IEEE 802.11n、IEEE 802.16e等。它是3G乃至将来4G通信系统中的核心技术之一。 当今LDPC码构造的主流方向有两个，分别是结合准循环（QC，Quasi Cyclic）移位结构的单次扩展构造和类似重复累积（RA，Repeat Accumulate）码构造。相应地，主要的LDPC码编码算法有基于生成矩阵的算法和基于迭代译码的算法。基于生成矩阵的编码算法吞吐量高，但是需要较多的寄存器和ROM资源；基于迭代译码的编码算法实现简单，但是吞吐量不高，且不容易构造高性能的好码。 本文在研究了上述几种码构造和编码算法之后，结合编译码器综合实现的复杂度考虑，提出了一种切实可行的基于二次扩展（Dex，Duplex Expansion）的QC-LDPC码构造方法，以实现高吞吐量的LDPC码收发端；并且充分利用该类码校验矩阵准循环移位结构的特点，结合RU算法，提出了一种新编码器的设计方案。 基于二次扩展的QC-LDPC码构造方法，是通过对母矩阵先后进行乱序扩展（Pex，Permutation Expansion）和循环移位扩展（CSEx，Cyclic Shift Expansion）实现的。在此基础上，为了实现可变码长、可变码率，一般编译码器需同时支持多个乱序扩展和循环移位扩展的扩展因子。本文所述二次扩展构造方法的特点在于，固定循环移位扩展的扩展因子大小不变，支持多个乱序扩展的扩展因子，使得译码器结构得以精简；构造得到的码字具有近似规则码的结构，便于硬件实现；（伪）随机生成的循环移位系数能够提高码字的误码性能，是对硬件实现和误码性能的一种折中。 新编码器在很大程度上考虑了资源的复用，使得实现复杂度近似与码长成正比。考虑到吞吐量的要求，新编码器结构完全抛弃了RU算法中串行的前向替换（FS，Forward Substitution）模块，同时简化了流水线结构，由原先RU算法的6级降低为4级；为了缩短编码延时，设计时安排每一级流水线计算所需的时钟数大致相同。 这种码字构造和编码联合设计方案具有以下优势：相比RU算法，新方案对可变码长、可变码率的支持更灵活，吞吐量也更大；相比基于生成矩阵的编码算法，新方案节省了50％以上的寄存器和ROM资源，单位资源下的吞吐量更大；相比类似重复累积码结构的基于迭代译码的编码算法，新方案使高性能LDPC码的构造更为方便。以上结果都在Xilinx Virtex II pro 70 FPGA上得到验证。 通过在实验板上实测表明，上述基于二次扩展的QC-LDPC码构造和相应的编码方案能够实现高吞吐量LDPC码收发端，在实际应用中具有很高的价值。 目前，LDPC码正向着非规则、自适应、信源信道及调制联合编码方向发展。跨层联合编码的构造方法，及其对应的编码算法，也必将成为信道编码理论未来的研究重点。
上传时间： 2013-07-26
上传用户：qoovoop
介绍一种简单射频识别系统设计。该设计包括阅读器、应答器和线圈3部分。由单片机控制阅读器向应答器发射无线信号，并接收应答器回送的信号，再通过分析回送信号识别物品。阅读器和应答器之间以半双工通信方式通信。 Abstract: A simple design of radio frequency identification system is given in this paper.The design includes reader,responder and winding.Through MCU，signals are sent to responder from reader，then corresponding signals are sent back. According to the analysis of the signals sent back，the objects can be identified.Half-Duplex communication is adopted? between? reader? and? responder.
上传时间： 2013-10-11
上传用户：plsee
基于幅移键控技术ASK（Amplitude-Shift Keying），以C8051F340单片机作为监测终端控制器，C8051F330D单片机作为探测节点控制器，采用半双工的通信方式，通过监控终端和探测节点的无线收发电路，实现数据的双向无线传输。收发电路采用直径为0.8 mm的漆包线自行绕制成圆形空心线圈天线，天线直径为（3.4±0.3）cm。试验表明，探测节点与监测终端的通信距离为24 cm，通过桥接方式，节点收发功率为102 mW时，节点间的通信距离可达20 cm。与传统无线收发模块相比，该无线收发电路在受体积、功耗、成本限制的场合有广阔的应用前景。 Abstract: Based on ASK technology and with the C8051F340 and C8051F330D MCU as the controller， using half-Duplex communication mode， this paper achieves bi-directional data transfer. Transceiver circuit constituted by enameled wire which diameter is 0.8mm and wound into a diameter （3.4±0.3） cm circular hollow coil antenna. Tests show that the communication distance between detection and monitoring of the terminal is 24cm，the distance is up to 20cm between two nodes when using the manner of bridging and the node transceiver power is 102mW. Compared with the conventional wireless transceiver modules， the circuit has wide application prospect in small size， low cost and low power consumption and other characteristics.
上传时间： 2013-10-19
上传用户：xz85592677
The LPC1700 Ethernet block contains a full featured 10 Mbps or 100 Mbps Ethernet MAC (Media Access Controller) designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or full Duplex operation, flow control, control frames, hardware acceleration for transmit retry, receive packet filtering and wake-up on LAN activity. Automatic frame transmission and reception with Scatter-Gather DMA off-loads many operations from the CPU.
上传时间： 2013-11-09
上传用户：geshaowei
The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half Duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.
标签： synchronous Emulating serial
上传时间： 2014-01-31
上传用户：z1191176801
8051参考设计，与其他8051的免费IP相比，文档相对较全，Oregano System 提供 This is version 1.3 of the MC8051 IP core. September 2002: Oregano Systems - Design & Consulting GesmbH Change history: - Improved tb_mc8051_siu_sim.vhd to verify Duplex operation. - Corrected problem with Duplex operation in file mc8051_siu_rtl.vhd
上传时间： 2014-12-28
上传用户：tb_6877751
AFDX（ Avionics Full Duplex Switch Ethernet）是空客公司首先提出的， 在商用以太网技术的基础上，通过增加特殊功能来保证航空应用的确定性和可靠性，是目前最先进的机载通信网络。文中针对航电设备与总线网络通信出现的故障，设计了某型号飞机AFDX总线监控器，该设备是一个便携式工控机，通过扩展AFDX总线接口卡，实时、高速、可靠的对总线上的数据进行记录、分析、显示，并依照航电总线标准ICD（接口控制文件）库进行解析，快速准确的定位故障，避免设备的无故障拆装，提高维护效率。仿真实验表明：该监控器可实时监控航电AFDX 总线上的所有动态信息，对信息的分析处理正确，能满足设计需求。
上传时间： 2013-10-17
上传用户：zyt
8051参考设计，与其他8051的免费IP相比，文档相对较全，Oregano System 提供 This is version 1.3 of the MC8051 IP core. September 2002: Oregano Systems - Design & Consulting GesmbH Change history: - Improved tb_mc8051_siu_sim.vhd to verify Duplex operation. - Corrected problem with Duplex operation in file mc8051_siu_rtl.vhd
上传时间： 2013-11-06
上传用户：XLHrest
Features • Compatible with MCS-51® Products • 8K Bytes of In-System Programmable (ISP) Flash Memory – Endurance: 1000 Write/Erase Cycles • 4.0V to 5.5V Operating Range • Fully Static Operation: 0 Hz to 33 MHz • Three-level Program Memory Lock • 256 x 8-bit Internal RAM • 32 Programmable I/O Lines • Three 16-bit Timer/Counters • Eight Interrupt Sources • Full Duplex UART Serial Channel • Low-power Idle and Power-down Modes • Interrupt Recovery from Power-down Mode • Watchdog Timer • Dual Data Pointer • Power-off Flag
标签： 8226 Programmable Compatible In-System
上传时间： 2015-06-27
上传用户：dianxin61
看n2实例 #Create a simulator object set ns [new Simulator] #Define different colors for data flows #$ns color 1 Blue #$ns color 2 Red #Open the nam trace file set nf [open out-1.nam w] $ns namtrace-all $nf set f0 [open out0.tr w] set f1 [open out1.tr w] #Define a finish procedure proc finish {} { global ns nf $ns flush-trace #Close the trace file close $nf #Execute nam on the trace file exit 0 } #Create four nodes set n0 [$ns node] set n1 [$ns node] set n2 [$ns node] set n3 [$ns node] #Create links between the nodes $ns Duplex-link $n0 $n2 1Mb 10ms
标签： simulator Simulator different Create
上传时间： 2016-07-02
上传用户：wfl_yy
