* 高斯列主元素消去法求解矩阵方程AX=B,其中A是N*N的矩阵,B是N*M矩阵 * 输入: n----方阵A的行数 * a----矩阵A * m----矩阵B的列数 * b----矩阵B * 输出: det----矩阵A的行列式值 * a----A消元后的上三角矩阵 * b----矩阵方程的解X
上传时间： 2015-07-26
上传用户：xauthu
We have a group of N items (represented by integers from 1 to N), and we know that there is some total order defined for these items. You may assume that no two elements will be equal (for all a, b: a<b or b<a). However, it is expensive to compare two items. Your task is to make a number of comparisons, and then output the sorted order. The cost of determining if a < b is given by the bth integer of element a of costs (space delimited), which is the same as the ath integer of element b. Naturally, you will be judged on the total cost of the comparisons you make before outputting the sorted order. If your order is incorrect, you will receive a 0. Otherwise, your score will be opt/cost, where opt is the best cost anyone has achieved and cost is the total cost of the comparisons you make (so your score for a test case will be between 0 and 1). Your score for the problem will simply be the sum of your scores for the individual test cases.
标签： represented integers group items
上传时间： 2016-01-17
上传用户：jeffery
(1) 、用下述两条具体规则和规则形式实现.设大写字母表示魔王语言的词汇 小写字母表示人的语言词汇 希腊字母表示可以用大写字母或小写字母代换的变量.魔王语言可含人的词汇. (2) 、B→tAdA A→sae (3) 、将魔王语言B(ehnxgz)B解释成人的语言.每个字母对应下列的语言.
上传时间： 2013-12-30
上传用户：ayfeixiao
1.有三根杆子A,B,C。A杆上有若干碟子 2.每次移动一块碟子,小的只能叠在大的上面 3.把所有碟子从A杆全部移到C杆上 经过研究发现，汉诺塔的破解很简单，就是按照移动规则向一个方向移动金片： 如3阶汉诺塔的移动：A→C,A→B,C→B,A→C,B→A,B→C,A→C 此外，汉诺塔问题也是程序设计中的经典递归问题
上传时间： 2016-07-25
上传用户：gxrui1991
1. 下列说法正确的是 （ ） A. Java语言不区分大小写 B. Java程序以类为基本单位 C. JVM为Java虚拟机JVM的英文缩写 D. 运行Java程序需要先安装JDK 2. 下列说法中错误的是 ( ) A. Java语言是编译执行的 B. Java中使用了多进程技术 C. Java的单行注视以//开头 D. Java语言具有很高的安全性 3. 下面不属于Java语言特点的一项是( ) A. 安全性 B. 分布式 C. 移植性 D. 编译执行 4. 下列语句中，正确的项是 ( ) A . int $e,a,b=10 B. char c,d=’a’ C. float e=0.0d D. double c=0.0f
上传时间： 2017-01-04
上传用户：netwolf
this is a digital intercom projects using ADC PWM and UART interrupt. you take the value from mic enter it to ADC and then send serially to the other microcontroller which receives the data and transform the digital data into analog data by PWM which is connected to speaker
标签： interrupt intercom projects digital
上传时间： 2017-04-19
上传用户：亚亚娟娟123
The design and manufacturing of wireless radio frequency (RF) transceivers has developed rapidly in recent ten yeas due to rapid development of RF integrated circuits and the evolution of high-speed digital signal processors (DSP). Such high speed signal processors, in conjunction with the development of high resolution analog to digital converters and digital to analog converters, has made it possible for RF designers to digitize higher intermediate frequencies, thus reducing the RF section and enhancing the overall performance of the RF section.
标签： Transceivers Wireless Digital
上传时间： 2020-05-27
上传用户：shancjb
Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.
上传时间： 2013-11-17
上传用户：菁菁聆听
Abstract: This application note describes a new generation of digital-input Class D audio amplifiers that achieve high PSRRperformance, comparable to traditional analog Class D amplifiers. More importantly, these digital-input Class D amplifiersprovide additional benefits of reduced power, complexity, noise, and system cost.
上传时间： 2013-12-20
上传用户：JIUSHICHEN
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上传时间： 2013-10-25
上传用户：banyou
