clear all;close all;clc;clf; t=0:pi/20:40*pi; dt=pi/20; %定义t及抽样间隔 fc=1/2/pi; fm=1/4/pi; a1=fc-fm; b1=fc+fm; Carrier…
Carrier+Ethernet 源代码
汇集 Carrier+Ethernet 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
clear all;close all;clc;clf; t=0:pi/10:40*pi; dt=pi/10; %定义t及抽样间隔 fc=1/2/pi; fm=1/4/pi; a1=fc-fm; b1=fc+fm; Carri…
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Carrier is port( clk : in std_logic; …
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Carrier is port( clk : in std_logic; …
Classic Timing Analyzer report for FSK Thu Jun 12 10:23:34 2008 Quartus II Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Fu…
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Carrier is port( clk : in std_logic; …
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*********…
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*********…
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*********…
Analysis & Synthesis report for FSK Thu Jun 12 10:23:23 2008 Quartus II Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full …