基于FPGA的RISC CPU设计
适用于嵌入式系统开发与计算机架构研究,基于FPGA实现的RISC CPU设计,具备清晰的指令集结构和可验证的逻辑电路,适合教学与实验验证场景。
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适用于嵌入式系统开发与计算机架构研究,基于FPGA实现的RISC CPU设计,具备清晰的指令集结构和可验证的逻辑电路,适合教学与实验验证场景。
Single Carrier Frequency Domain Equalization Simulation(单载波频域均衡仿真程序)
FM1702的例子程序 Chip type : ATmega16L Program type : Application Clock frequency : 7.372800 MHz Memory model : Small Ex...
sfrmat is a Matlab function that provides a spatial frequency response* (SFR) from a digital image file containing a sla...
a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display
Matlab demonstration script for frequency modulation.供刚接触到matlab的朋友使用
I often need a simple function generator. Just to generate a certain frequency. After all the years I ve worked with ele...
This m file plots the time and frequency domain of UWB PPM(pulse position modulated) waveforms(monocycles and doublets) ...
It s a IEEE paper.In this paper,the author proposed two new frequency synchronization unsing PN sequences for OFDM syste...
Compute the matrix of mel filter coefficients given the sampling frequency, the length of the FFT and the number of desi...