CPLD
CPLD采用CMOSEPROM、EEPROM、快闪存储器和SRAM等编程技术,从而构成了高密度、高速度和低功耗的可编程逻辑器件。cPCI总线
资源总数
1,379
CPLD 全部资料 1,379 份
XAPP440 - Xilinx CPLD的上电性能
Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as i...
2013-11-24
164
XC9500XL CPLD器件进行设计
To get the best performance from any CPLD the designermust be aware of its internal architecture
2024-02-07
9
XC9500XL CPLD器件进行设计
To get the best performance from any CPLD the designermust be aware of its internal architecture
2023-12-01
10