·目录1. Radio signals on the move 12. Antenna basics 193. Wire, connection, grounds, and all that 494. Marconi and other unbalanced antennas 695. Doublets, dipoles, and other Hertzian antennas 876. Limit
上传时间： 2013-06-14
上传用户：lingduhanya
·详细说明：AAC音频解码算法程序-AAC audio frequency decoding algorithm procedure 文件列表: AAC_Codec .........\daac.01.11.12 .........\.............\all.h .........\.............\audio_out.cp
上传时间： 2013-05-26
上传用户：wangchong
·文件列表: aacenc.h aac_qc.c aac_qc.h aac_se_enc.c aac_se_enc.h all.h bitstream.c bitstream.h block.h COPYING dolby_def.h
上传时间： 2013-07-01
上传用户：1966640071
针对未来十年的 “All-Programmable”器件的颠覆之作
上传时间： 2013-04-24
上传用户：hgy9473
Protel99se鼠标增强软件2.0: 2.0版本改名为“Protel99se鼠标增强软件”，是因为使用普通三键鼠标也可实现 放大和缩小功能。 1.0版本功能：(软件名称：“Protel99se增加鼠标滚轮放大缩小功能”) 向上滚动滚轮 --> Zoom In 放大（PageUp键） 向下滚动滚轮 --> Zoom Out 缩小（PageDown键） 单击中键 --> Zoom Pan 移动屏幕 (Home键) 2.0版本新增功能： 1.在手动布局时，按鼠标左键移动元件时，再点击右键，可旋转元件。（非常好用的功能） 2.增加鼠标中键手形功能，按住中键，移动鼠标，放开中键，为一个手形功能。 按中键向左移动 --> 在画线时退回上一步（退格键） 按中键向右移动 --> 删除有焦点的对象（Delete键） 按中键向上移动 --> 放置元件时，进入修改元件属性 （Tab键） 按中键向下移动 --> 放置元件时，用于旋转元件（空格键） 按中键向左上移动 --> Zoom Out 缩小（PageDown键） 按中键向右下移动 --> Zoom In 放大（PageUp键） 按中键向右上移动 --> Clear 删除所有选择的对象（Ctrl+Delete键） 按中键向左下移动 --> Fit All Objects 显示所有元件（Ctrl+PageDown键） 3.在PCB、SCH、PCBLib、SCHLib四个编辑器中都能实现本软件的所有功能。
上传时间： 2013-07-02
上传用户：电子世界
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
标签： Efficient Verilog Digital Coding
上传时间： 2013-11-22
上传用户：han_zh
Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.
上传时间： 2013-11-17
上传用户：菁菁聆听
Designers of signal receiver systems often need to performcascaded chain analysis of system performancefrom the antenna all the way to the ADC. Noise is a criticalparameter in the chain analysis because it limits theoverall sensitivity of the receiver. An application’s noiserequirement has a signifi cant infl uence on the systemtopology, since the choice of topology strives to optimizethe overall signal-to-noise ratio, dynamic range andseveral other parameters. One problem in noise calculationsis translating between the various units used by thecomponents in the chain: namely the RF, IF/baseband,and digital (ADC) sections of the circuit.
上传时间： 2014-12-05
上传用户：cylnpy
A complete design for a data acquisition card for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 processors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.
上传时间： 2013-10-29
上传用户：BOBOniu
PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
标签： Architecture ExpressTM PCI
上传时间： 2013-11-03
上传用户：gy592333
