This paper investigates the design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via satellite (DVB-RCS). The proposed joint estimation algorithm is based on the interpolation technique for two correlation values in the frequency and phase domains. This simple interpolation technique can significantly improve frequency and phase resolution capabilities of the proposed technique without increasing the number of the correlation values. In addition, the overall block diagram of a digital communications receiver for DVB-RCS is presented, which was designed using the proposed estimation algorithms. Index Terms—Carrier phase estimation, DVB-RCS, frequency offset estimation, interpolation, joint estimation, MF-TDMA.
标签： investigates estimation frequency carrier
上传时间： 2015-12-30
上传用户：ls530720646
The TMS320C64x™ DSPs (including the TMS320DM642 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320DM642 (DM642) device is based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™ ) developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x™ is a code-compatible member of the C6000™ DSP platform.
标签： highest-performance fixed-point TMS 320
上传时间： 2013-12-21
上传用户：watch100
aDABOOST This package contains the following files: learner.jar - is a platform independent java package. In order to run it on windows/linux open the command prompt/shell and type the command "java -jar learner.jar". Make sure the java installation path is set in the system enviroment. learner.exe - A windows executable version of the application. Doubleclick to run. learner.pdf - The digital version of the report. SRC\ - The source code of the program is in this directory
标签： independent following aDABOOST contains
上传时间： 2014-12-05
上传用户：xsnjzljj
Easy-to-Use, Ultra-Tiny, Differential, 16-Bit Delta Sigma ADC With I2C Interface The LTC2453 is an ultra-tiny, fully differential, 16-bit, analog-to-digital converter. The LTC2453 uses a single 2.7V to 5.5V supply and communicates through an I2C interface. The ADC is available in an 8-pin, 3mm x 2mm DFN package. It includes an integrated oscillator that does not require any external components. It uses a delta-sigma modulator as a converter core and has no latency for multiplexed applications. The LTC2453 includes a proprietary input sampling scheme that reduces the average input sampling current several orders of magnitude lower than conventional delta-sigma converters. Additionally, due to its architecture, there is negligible current leakage between the input pins.
标签： Differential Easy-to-Use Ultra-Tiny Interface
上传时间： 2014-01-08
上传用户：凤临西北
An instrument other than a watch for measuring or indicating time, especially a mechanical or electronic device having a numbered dial and moving hands or a digital display.break down the enemy s resistance
标签： instrument especially indicating mechanical
上传时间： 2014-01-11
上传用户：二驱蚊器
通过信号与系统以及数字信号处理中所学的理论知识，基于调幅和调频的基本原理，运用产生信号的两种基本方法，使用CCS软件以及Digital Signal Processor实现调幅调频信号的发生。
上传时间： 2016-03-20
上传用户：lht618
myTemp is used to connect PalmOS PDAs to Dallas Microlan(tm) Devices. It currently supports DS1820/DS18S20 Digital Thermometers Copyright (C) 2000 Christof Klaiber
标签： currently Microlan supports connect
上传时间： 2016-04-04
上传用户：dbs012280
SHA-1(Secure Hash Algorithm)是美国国家标准局(National Institute of Standard and Technology NIST)为了配合数位签章演算法(Digital Signature Algorithm DSA)的使用所发布的联邦资讯处理标准-FIPS PUB 180-1(Federal Information Processing Standard Publication 180-1),而SHA-1 则是SHA-1 (FIPS180)的改良版,现今与MD5 皆广被使用拿来做密码验证功能.其设计的方法是根据MD4,来对输入的资料讯息(Message)产生出一个160 位元的讯息摘要(Digest) ,对於资料安全性提供了有效的保障.
标签： Technology Algorithm Institute National
上传时间： 2014-01-01
上传用户：gxf2016
在单片机应用系统中，常用到模拟输出，数模D/A转换器（Digital to Analog Converter）是一种能把数字量转换成模拟量的电子器件
上传时间： 2016-04-11
上传用户：talenthn
This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequency detector (PFD) and digital-to-analog converter (DAC) circuit element to obtain >28dB high frequency noise reduction when compared to classicalfrequency synthesis.
标签： fractional-N transmitter bandwidth circuits
上传时间： 2016-04-14
上传用户：er1219
