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A Top-Down Verilog-A Design on the digital phase-lockedmloop
A project by word about a fee collection system on highway
its a ofdma simulink model. with a modulation scheme on 8psk
a bout union_find set , which is a very useful data structrue.
a genetic algorithm to find the maximum of a polynomial function
this is a sample of a java bot. use to educate..
A code that show the count back to a date determinate.
Program that demonstrates a socket connection in a mobile phone scenario.
Displaying A Picture On A 128x64 Graphical LCD Using PIC 16f877
Description of a sistolic arhictecture for a FFT implementation in FPGA.