A First in first out buffer in Verilog
A First in first out buffer in Verilog...
A First in first out buffer in Verilog...
A book about reed solomon encoding and decoding....
How to configurate squid in a silent mode...
it is a sample code for s3c2410 board....
it is a sample code for s3c2410 board....
it is a sample code for s3c2410 board....
This code creates a 8 bit full multiplier....
A*算法的优化范例,使用BCB6.0编写的Windows程序,可以作为教学范例...
This a good paper about UWB channel estimation....
A good resource for 2D FFT and DCT...