The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
上传时间: 2013-10-28
上传用户:15501536189
MIFARE Plus在当前主流非接触式智能卡应用的基础上提供更高的安全性,并且可轻易升级现有卡片的安全级别。在升级到新的安全级别之前,MIFARE Plus是唯一兼容MIFARE4K(MF1ICS70),MIFARE 1K(MF1ICS50)和MIFARE Mini(MF1ICS20)的主流智能卡。安全性升级后,MIFARE Plus使用AES(高级加密标准)进行认证,数据完整性和数据加密操作。MIFARE Plus的空中接口和加密方式是基于安全级别最高的全球开放式标准,。
上传时间: 2013-12-22
上传用户:banyou
On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UART serial port, the ISP command handler (resides in the bootloader) allows erasure of one or more sector (s) of the on-chip flash memory.
上传时间: 2013-12-13
上传用户:lmq0059
LPC1100系列Cortex-M0微处理器A/D转换器的基本时钟由APB时钟提供。A/D转换器包含一个可编程的分频器,它可以将APB时钟调整为逐次逼近转换所需的时钟(最大可达4.5MHz,并且完全满足精度要求的转换需要11个这样的时钟)。
上传时间: 2013-10-11
上传用户:二驱蚊器
上传时间: 2013-11-10
上传用户:小眼睛LSL
This errata sheet describes both the known functional problems and anydeviations from the electrical specifications known at the release date ofthis document.Each deviation is assigned a number and its history is tracked in a table atthe end of the document.
上传时间: 2014-12-31
上传用户:thuyenvinh
PE管道热熔对接焊的工艺参数随管道尺度和环境条件的不同而不同,同时还受人为因素的影响,对焊接机自动化程度要求很高。介绍了基于ARM嵌入式热熔焊接机智能控制器的硬件和软件的设计方案。此方案符合焊接各个阶段工艺参数指标,并具有操作纠错及错误信息管理功能,最大程度地消除了人为因素的影响,提高焊接质量,并具备焊接数据的可追溯性,便于管理人员对焊接工程的管理。
上传时间: 2014-12-31
上传用户:515414293
上传时间: 2013-10-19
上传用户:黄婷婷思密达
上传时间: 2013-11-15
上传用户:youmo81
PCI Express是由Intel,Dell,Compaq,IBM,Microsoft等PCI SIG联合成立的Arapahoe Work Group共同草拟并推举成取代PCI总线标准的下一代标准。PCI Express利用串行的连接特点能轻松将数据传输速度提到一个很高的频率,达到远远超出PCI总线的传输速率。一个PCI Express连接可以被配置成x1,x2,x4,x8,x12,x16和x32的数据带宽。x1的通道能实现单向312.5 MB/s(2.5 Gb/s)的传输速率。Xilinx公司的Virtex5系列FPGA芯片内嵌PCI-ExpressEndpoint Block硬核,为实现单片可配置PCI-Express总线解决方案提供了可能。 本文在研究PCI-Express接口协议和PCI-Express Endpoint Block硬核的基础上,使用Virtex5LXT50 FPGA芯片设计PCI Express接口硬件电路,实现PCI-Express数据传输
上传时间: 2013-12-27
上传用户:wtrl