*2-7.sp CIRCUIT FOR SENSITIVITY ANALYSIS VS 1 0 DC 10V R1 1 2 40 R2 2 0 …
0-10V 源代码
汇集 0-10V 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
*2-7.sp CIRCUIT FOR SENSITIVITY ANALYSIS VS 1 0 DC 10V R1 1 2 40 R2 2 0 …
Ex2_20.CIR - Zener diode spike clipper .PARAM f=1kHz T={1/f} vs 1 0 SIN( 0V 10V {f} ) * Set 10V spike at positive peak of vs v…
.OPTION POST=2 V1 10 0 PWL(0ns 0v 4ns 10v 6ns 0v 10ns 10v 12ns +0v) R1 10 0 10MEG .TRAN 0.1ns 12ns .END
.OPTION POST=2 V1 10 0 PWL(0ns 0v 4ns 10v 6ns 0v 10ns 10v 12ns +0v) R1 10 0 10MEG .TRAN 0.1ns 12ns .END
Prb2_27.CIR v 1 0 DC 0V D1 1 2 DMOD R1 2 3 6kohm V1 0 3 DC 5V D2 1 4 DMOD R2 4 5 3kohm V2 5 0 DC 10V .DC v -10V 25V 0.25V…
Ex1_13.CIR - Avg & rms current, avg power vsVB 1 0 SIN(20V 10V 100Hz 0 0 -30deg) R 1 0 10ohm .PROBE .TRAN 5us 10ms .END
Silicon Resistor * This simulation demonstrates the effects of velocity saturation at * high lateral electric fields. VPP 1 0 10…
* source TEMP V_V1 N00452 0 +PULSE 0V 10V 2us 2us 2us 2us 8us R_R1 N00452 VC2 Rbreak 20 C_C1 VC2 0 C…