代码搜索：wrapper
找到约 10,000 项符合「wrapper」的源代码
代码结果 10,000
www.eeworm.com/read/385629/8795781
v altmemddr_phy_alt_mem_phy_sequencer_wrapper.v
//
`ifdef ALT_MEM_PHY_DEFINES
`else
`include "alt_mem_phy_defines.v"
`endif
//
module altmemddr_phy_alt_mem_phy_sequencer_wrapper (
seq_clk,
www.eeworm.com/read/426536/9014497
pdf fully automatic wrapper generation for search engines2005.pdf
www.eeworm.com/read/426536/9014507
pdf interactive wrapper generation with minimal user effort 2006.pdf
www.eeworm.com/read/298894/7927095
m ber_sim_awgn_multipath_data_154a_wrapper.m
%
%
clear all
%
%
FS_CONT = 8e9;
RSCODE = 0;
if RSCODE == 1
DATA_LENGTH = 1014;
else
DATA_LENGTH = 1016;
end
Npacket = 2;
Nu = 1;
LAMBDA = 30
www.eeworm.com/read/7658/126506
prj plb_bram_if_cntlr_1_bram_wrapper_xst.prj
VERILOG plb_bram_if_cntlr_1_bram_elaborate_v1_00_a C:\myproj2\firewall\myxps\hdl\elaborate\plb_bram_if_cntlr_1_bram_elaborate_v1_00_a/hdl/verilog/plb_bram_if_cntlr_1_bram_elaborate.v
verilog work ../
www.eeworm.com/read/7658/126521
srp plb_bram_if_cntlr_1_bram_wrapper_xst.srp
Release 8.2.02i - xst I.34
Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.
-->
TABLE OF CONTENTS
1) Synthesis Options Summary
2) HDL Compilation
3) Design Hierarchy Analysis
4) HDL
www.eeworm.com/read/7658/126525
scr plb_bram_if_cntlr_1_bram_wrapper_xst.scr
run
-opt_mode speed
-opt_level 1
-p xc2vp30ff896-7
-top plb_bram_if_cntlr_1_bram_wrapper
-ifmt MIXED
-ifn plb_bram_if_cntlr_1_bram_wrapper_xst.prj
-ofn ../implementation/plb_bram_if_cntlr_1_bra
www.eeworm.com/read/7658/126540
scr ps2_ports_io_adapter_wrapper_xst.scr
run
-opt_mode speed
-opt_level 1
-p xc2vp30ff896-7
-top ps2_ports_io_adapter_wrapper
-ifmt MIXED
-ifn ps2_ports_io_adapter_wrapper_xst.prj
-ofn ../implementation/ps2_ports_io_adapter_wrapper.ng
www.eeworm.com/read/7658/126542
prj ps2_ports_io_adapter_wrapper_xst.prj
VERILOG dual_ps2_ioadapter_v1_00_a C:\V2P_CD\V2P_CD\lib\lib_rev_1_1\lib\XilinxProcessorIP\pcores\dual_ps2_ioadapter_v1_00_a/hdl/verilog/dual_ps2_ioadapter.v
verilog work ../hdl/ps2_ports_io_adapter_w
www.eeworm.com/read/7658/126550
srp ps2_ports_io_adapter_wrapper_xst.srp
Release 8.2.02i - xst I.34
Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.
-->
TABLE OF CONTENTS
1) Synthesis Options Summary
2) HDL Compilation
3) Design Hierarchy Analysis
4) HDL