代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
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www.eeworm.com/read/374782/9384962
hif period_led.hif
Version 7.0 Build 33 02/05/2007 SJ Full Version
35
1941
OFF
OFF
OFF
OFF
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
--
www.eeworm.com/read/178219/9413683
qsf clock.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any
www.eeworm.com/read/176099/9516654
makefile
# $Id: Makefile,v 1.1.1.1 2005/01/04 02:05:54 arif_endro Exp $
#
all:
# $(MAKE) -C source fm ;
$(MAKE) -C source fm_v;
export: all
# mv -v source/*.vhd export/vhd/;
# cp -v source/modelsim_vhd.do
www.eeworm.com/read/175203/9555637
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity xcv is
generic(
IDIE : integer := 0;
A : integer := 1;
B : integer := 2;
C
www.eeworm.com/read/364872/9889440
txt make_fpga.txt
verilog ../../../syn/src/verilog/oc8051_fpga_top.v ../../../bench/verilog/oc8051_fpga_tb.v ../../../rtl/verilog/oc8051_top.v ../../../rtl/verilog/oc8051_alu_src1_sel.v ../../../rtl/verilog/oc8051_alu_
www.eeworm.com/read/364724/9897049
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity glbl is
generic(
ROC_WIDTH : integer := 100000;
TOC_WIDTH : integer := 0
);
end glbl;
www.eeworm.com/read/364724/9897054
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity clk is
port(
clk_in : in vl_logic;
reset : in vl_logic;
clk_out : out vl_logic
)
www.eeworm.com/read/364723/9897104
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity glbl is
generic(
ROC_WIDTH : integer := 100000;
TOC_WIDTH : integer := 0
);
end glbl;
www.eeworm.com/read/364636/9902399
qsf ps2tolcd.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any
www.eeworm.com/read/364280/9914316
qmsg ps2.tan.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0}
{ "I