代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/366182/9826139
vhd 33_comparer.vhd
-- Author : yzf
-- Created On: Thu Dec 21 09:46:16 1995
-- Testbench for comp.comp
library STD;
library WORK;
--library comp;
use STD.STANDARD.ALL;
--use COMP.TYPES.ALL;
use WORK.TYPES.
www.eeworm.com/read/169299/9868646
transcript
# do selwave.ado
# ** Warning: (vlib-34) Library already exists at "work".
# resume
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loadin
www.eeworm.com/read/167222/9975025
v test_clock.v
module testbench_clock;
wire clk;
clock c (clk);
test t (clk);
endmodule
module test(clk);
input clk;
initial begin
$monitor($time,,,"clock=%b",clk);
#50 $stop;
www.eeworm.com/read/278084/10575358
vhd 56_vhdl.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
library STD;
library WORK;
use STD.STANDARD.ALL;
use WORK.ALL;
entity test_prefetch is
end t
www.eeworm.com/read/278084/10575870
vhd 33_comparer.vhd
-- Author : yzf
-- Created On: Thu Dec 21 09:46:16 1995
-- Testbench for comp.comp
library STD;
library WORK;
--library comp;
use STD.STANDARD.ALL;
--use COMP.TYPES.ALL;
use WORK.TYPES.
www.eeworm.com/read/452554/7437169
do ex_319_wave.do
# compile
vlog EX_319.v
vlog EX_319_top.v
vlog EX_319_tb.v
#vlog EX_319_tb_task.v
# simulate
vsim -coverage testbench
#probe signals
add wave -noupdate -format -logic /testben
www.eeworm.com/read/449309/7508945
do initialize_c_code_debug.do
#compile all hdl files
vcom "$DSN\src\Gates.vhd"
vcom "$DSN\src\Fub5.bde"
vcom "$DSN\src\Fub4.bde"
vcom "$DSN\src\Fub3.bde"
vcom "$DSN\src\Fub2.bde"
vcom "$DSN\src\Fub1.bde"
vcom "$DSN\sr
www.eeworm.com/read/449309/7508947
do runme.do
saveAllTabs
quiet on
setactivelib -work
clear -log
@clearfile $dsn\results.txt
vcom "$DSN\src\Gates.vhd"
vcom "$DSN\src\Fub5.bde"
vcom "$DSN\src\Fub4.bde"
vcom "$DSN\src\Fub3.bde"
www.eeworm.com/read/297692/8004224
do comp_gate.do
echo *** Compiling core and testbench for simulation ...
vlib work
vlog diff_io_top.vo
vlog testbench.v
www.eeworm.com/read/332095/12780983
vhd cordic_tst.vhd
-- VHDL Test Bench Created from source file sc_corproc.vhd -- 12/07/06 11:47:39
--
-- Notes:
-- 1) This testbench template has been automatically generated using types
-- std_logic and std_logic_vec