代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/154094/5642461
transcript
# Reading C:/Modeltech_5.5f/win32/../tcl/vsim/pref.tcl
# do testbench.tdo
# Model Technology ModelSim SE vlog 5.5f Compiler 2002.01 Jan 7 2002
# -- Compiling module glbl
# Top level modules:
#
www.eeworm.com/read/202886/15370014
vhd simtut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\SIMTUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:36:48 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
L
www.eeworm.com/read/202886/15370018
vhd tut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:41:18 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBR
www.eeworm.com/read/202886/15370022
vhd simtut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\SIMTUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:36:48 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
L
www.eeworm.com/read/202886/15370024
vhd tut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:41:18 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBR
www.eeworm.com/read/387422/8684776
transcript
# Reading c:/program files/Modeltech_5.7e/win32/../tcl/vsim/pref.tcl
# do can_testbench.fdo
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vlog 5.7e Comp
www.eeworm.com/read/202633/7125014
transcript
# Reading c:/program files/Modeltech_5.7e/win32/../tcl/vsim/pref.tcl
# do can_testbench.fdo
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vlog 5.7e Comp
www.eeworm.com/read/436670/7766290
vhd tb_sc_corproc.vhd
-- Testbench for CodicNCO
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity tb_sc_corproc is
end entity tb_sc_corproc;
architecture rt
www.eeworm.com/read/109660/6173097
do compile_and_run_rtl_busfuncmodel_v.do
vlog "$env(QUARTUS_ROOTDIR)/eda/sim_lib/excalibur/lpm/alt_exc_stripe_bfm.v"
vlog "$env(QUARTUS_ROOTDIR)/eda/sim_lib/ALTERA_MF.V"
vlog ../../embedded_stripe.v
vlog ../../../testbench/ahb
www.eeworm.com/read/7866/137511
do post_sim.do
--
--
--vlib work
--do spi_master.vtd
vcom -work work spi_master_timesim.vhd
vcom -explicit -work work spi_master_tb.vhd
vsim -lib work testbench
do wave_post_color.do
run 600 us
-- End