代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/141708/5769189
cpp top.cpp
#include "systemc.h"
#include "sc_mslib.h"
typedef int data_type;
int state=0;
bool bWrite=true;
SC_MODULE(testbench) {
sc_in_clk driver;
sc_signal signal;
void r
www.eeworm.com/read/109660/6173110
do compile_and_run_rtl_busfuncmodel_v.do
vlog "$env(QUARTUS_ROOTDIR)/eda/sim_lib/excalibur/lpm/alt_exc_stripe_bfm.v"
vlog "$env(QUARTUS_ROOTDIR)/eda/sim_lib/ALTERA_MF.V"
vlog ../../embedded_stripe.v
vlog ../../../testbench
www.eeworm.com/read/492009/6429776
tf stopwatch_tb.tf
`timescale 1ns/1ns
module func_testbench;
reg CLK;
reg RESET;
reg STRTSTOP;
wire [9:0] TENTHSOUT;
wire [6:0] ONESOUT;
wire [6:0] TENSOUT;
stopwatch TX_stopwatch (
.CLK(CLK),
.RESET(RESET)
www.eeworm.com/read/408799/11369622
tf stopwatch_tb.tf
`timescale 1ns/1ns
module func_testbench;
reg CLK;
reg RESET;
reg STRTSTOP;
wire [9:0] TENTHSOUT;
wire [6:0] ONESOUT;
wire [6:0] TENSOUT;
stopwatch TX_stopwatch (
.CLK(CLK),
.RESET(RESET)
www.eeworm.com/read/148748/12431334
vhd simtut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\SIMTUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:36:48 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
L
www.eeworm.com/read/148748/12431343
vhd tut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:41:18 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBR
www.eeworm.com/read/148748/12431356
vhd simtut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\SIMTUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:36:48 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
L
www.eeworm.com/read/148748/12431363
vhd tut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:41:18 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBR
www.eeworm.com/read/217282/14970984
cpp xsimtestbench_arch.cpp
#include "isim/work/delay_tbw3/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "C:/Xilinx/vhdl/hdp/nt/ieee/std_logic_116
www.eeworm.com/read/217282/14970992
cpp xsimtestbench_arch.cpp
#include "isim/work/delay_tbw2/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "C:/Xilinx/vhdl/hdp/nt/ieee/std_logic_116