代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
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vhd testbench.vhd
-- VHDL Test Bench Created from source file jtag_controller.vhd -- 15:24:02 06/16/2003
--
-- Copyright (C) 2003 by J. Kearney, Bolton, Massachusetts
--
-- This program is free software; you ca
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v testbench.v
/////////////////////////////////////////////////////////////////////
//// ////
//// Testbench for Color Space converters
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v testbench.v
/////////////////////////////////////////////////////////////////////
//// ////
//// Testbench for Color Space converters
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udo testbench.udo
## Project Navigator Verilog simulation template: testbench.udo
## You may edit this file to control your simulation.
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tf testbench.tf
`timescale 1ns/10ps
module testbench();
reg reset;
reg clk;
wire[31:0] counter;
initial
begin
reset=1;
clk=0;
#5 reset=0;
#5 reset=1;
#10000000 $stop;
end
always #50 clk=~clk;
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udo testbench.udo
## Project Navigator Verilog simulation template: testbench.udo
## You may edit this file to control your simulation.
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tf testbench.tf
`timescale 1ns/10ps
module testbench();
reg reset;
reg clk;
wire[31:0] counter;
initial
begin
reset=1;
clk=0;
#5 reset=0;
#5 reset=1;
#10000000 $stop;
end
always #50 clk=~clk;
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tdo testbench.tdo
## NOTE: Do not edit this file.
## Auto generated by Project Navigator for Verilog Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module prescale_counter
vlog -93 +libext+.v+.ve+
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v testbench.v
///*************************************************************///
/// ///
/// Reed-Solomon Decoder (31,19,6)