代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/383754/2614057
vhd jc2_test.vhd
-- VHDL Test Bench for jc2_top design functional and timing simulation
LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
ENTITY testbench IS
END testbench;
ARCHITECTURE testbench_arch OF testbench IS
CO
www.eeworm.com/read/188007/8580103
do post_sim.do
--
--
--vlib work
--do spi_master.vtd
vcom -work work spi_master_timesim.vhd
vcom -explicit -work work spi_master_tb.vhd
vsim -lib work testbench
do wave_post_color.do
run 600 us
-- End
www.eeworm.com/read/186438/8933483
do post_sim.do
--
--
--vlib work
--do spi_master.vtd
vcom -work work spi_master_timesim.vhd
vcom -explicit -work work spi_master_tb.vhd
vsim -lib work testbench
do wave_post_color.do
run 600 us
-- End
www.eeworm.com/read/424880/10403653
v uart_wb_utilities.v
//////////////////////////////////////////////////////////////////////
//// ////
//// uart_wb_utilities.v
www.eeworm.com/read/158843/10724443
epr cordic_beh.epr
"g:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_add_rtl.vhd" cordic_beh 1 0 1819696179
"g:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_control_rtl.
www.eeworm.com/read/348755/10868794
do post_sim.do
--
--
--vlib work
--do spi_master.vtd
vcom -work work spi_master_timesim.vhd
vcom -explicit -work work spi_master_tb.vhd
vsim -lib work testbench
do wave_post_color.do
run 600 us
-- End
www.eeworm.com/read/464438/7158443
ref hdllib.ref
EN digital_clk NULL E:/DEMO_FPGA/digital_clk_timesim.vhd sub00/vhpl00 1111691296
AR dfgf testbench_arch E:/DEMO_FPGA/dfgf.timesim_vhw sub00/vhpl03 1111691299
EN dfgf NULL E:/DEMO_FPGA/dfgf.timesim_v
www.eeworm.com/read/462030/7212071
vhd cpu_test.vhd
-- VHDL Test Bench Created from source file cpu_engine.vhd -- 12:41:11 06/20/2003
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for th
www.eeworm.com/read/451829/7455191
do post_sim.do
--
--
--vlib work
--do spi_master.vtd
vcom -work work spi_master_timesim.vhd
vcom -explicit -work work spi_master_tb.vhd
vsim -lib work testbench
do wave_post_color.do
run 600 us
-- End
www.eeworm.com/read/446517/7577259
order compilation.order
.\src\Fpga.bde
.\src\A8051_exp.bde
.\src\8051\registers.vhd
.\src\8051\InternalProgramMemory.vhd
.\src\8051\Console.vhd
.\src\8051\Timers.VHD
.\src\8051\AL8051.vhd
.\src\Devices\Types.vhd
.\sr