代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/174927/9568290
transcript
# Reading C:/Modeltech_xe/tcl/vsim/pref.tcl
# do test.fdo
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim XE II vcom 5.7c Compiler 2003.03 Mar 15 2003
# --
www.eeworm.com/read/163678/10150658
h eval_update.h
#ifndef EVAL_UPDATE_H
#define EVAL_UPDATE_H
//BEGIN eval_update/eval_update.cpp
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// DESCRIPTION
// This SystemC example
www.eeworm.com/read/158843/10724397
log console.log
acom {g:\2006春季课程\通信系统仿真与soc集成-周祖成-2005春\1_a_作业\hdesign\hdesign_lib\hdl\cordic_add_rtl.vhd} {g:\2006春季课程\通信系统仿真与soc集成-周祖成-2005春\1_a_作业\hdesign\hdesign_lib\hdl\cordic_control_rtl.vhd} {g:\2006春季课程\通信系统
www.eeworm.com/read/272617/10951729
vhd rcvr_tb.vhd
-- VHDL Test Bench Created from source file rcvr.vhd -- 17:36:24 04/12/2000
--
-- Notes:
-- 1) This testbench template has been automatically generated using types
-- std_logic and std_logic_ve
www.eeworm.com/read/170130/7102922
transcript
# Reading D:/Modeltech_6.0d/tcl/vsim/pref.tcl
# // ModelSim SE 6.0d Apr 25 2005
# //
# // Copyright Mentor Graphics Corporation 2005
# // All Rights Reserved.
# //
# // THIS WO
www.eeworm.com/read/449307/7508959
lib memory_example.lib
timestamp=1096034566417
[~A]
./src/ram.vhd~ram=0*0*351
./src/ram.vhd~ram_archram=0*408*891
./src/ram_tb.vhd~TB_ARCHITECTUREram_tb=0*956*10989
./src/ram_tb.vhd~TESTBENCH_FOR_ramram_tb=0*11067*11
www.eeworm.com/read/298792/7935040
vhd sweptest.vhd
-- Vhdl test bench created from schematic swepfre.sch - Fri Oct 05 10:44:07 2007
--
-- Notes:
-- 1) This testbench template has been automatically generated using types
-- std_logic and std_logic
www.eeworm.com/read/329969/12922885
fdo getpcm_t.fdo
-- NOTE: Do not edit this file.
-- Auto generated by VHDL Functional Simulation Models
--
vlib work
source {D:/ispTOOLS7_0/ispcpld/bin/chipsim_cmd.tcl}
set sty_file getpcmdata.sty
if {![info ex
www.eeworm.com/read/316426/13522932
transcript
# Reading C:/Modeltech_xe/tcl/vsim/pref.tcl
# do ss.fdo
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim XE vcom 5.6a Compiler 2002.04 Apr 29 2002
# -- Loadi
www.eeworm.com/read/309919/13661938
vhd rcvr_tb.vhd
-- VHDL Test Bench Created from source file rcvr.vhd -- 17:36:24 04/12/2000
--
-- Notes:
-- 1) This testbench template has been automatically generated using types
-- std_logic and std_logic_ve