代码搜索：sync
找到约 6,244 项符合「sync」的源代码
代码结果 6,244
www.eeworm.com/read/439082/1817497
h fcntl.h
/*
* include/asm-s390/fcntl.h
*
* S390 version
*
* Derived from "include/asm-i386/fcntl.h"
*/
#ifndef _S390_FCNTL_H
#define _S390_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks
www.eeworm.com/read/430518/1923790
h fcntl.h
/*
* include/asm-s390/fcntl.h
*
* S390 version
*
* Derived from "include/asm-i386/fcntl.h"
*/
#ifndef _S390_FCNTL_H
#define _S390_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks
www.eeworm.com/read/430518/1926475
h fcntl.h
/*
* include/asm-s390/fcntl.h
*
* S390 version
*
* Derived from "include/asm-i386/fcntl.h"
*/
#ifndef _S390_FCNTL_H
#define _S390_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks
www.eeworm.com/read/395929/2429821
d membar.d
#as: -Av9
#objdump: -dr
#name: sparc64 membar
.*: +file format .*sparc.*
Disassembly of section .text:
0+ :
0: 81 43 e0 00 membar 0
4: 81 43 e0 7f membar #Sync|#MemIssue|#Lookaside
www.eeworm.com/read/393286/2480605
c saa7146_vv_ksyms.c
#include
#include
EXPORT_SYMBOL_GPL(saa7146_start_preview);
EXPORT_SYMBOL_GPL(saa7146_stop_preview);
EXPORT_SYMBOL_GPL(saa7146_set_hps_source_and_sync);
EXPORT_
www.eeworm.com/read/383754/2613951
prj system_top.prj
verilog work "D:/Project_IC/PicoBlaze_Embedded/RTL/VGA/sync_gen_50M.v"
verilog work "D:/Project_IC/PicoBlaze_Embedded/RTL/VGA/picoblaze_vga_busif.v"
verilog work "D:/Project_IC/PicoBlaze_Embedded/RT
www.eeworm.com/read/382361/2637891
h rtl_posix_if.h
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
www.eeworm.com/read/357083/3029321
h fcntl.h
/*
* include/asm-s390/fcntl.h
*
* S390 version
*
* Derived from "include/asm-i386/fcntl.h"
*/
#ifndef _S390_FCNTL_H
#define _S390_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks
www.eeworm.com/read/357083/3031215
h fcntl.h
/*
* include/asm-s390/fcntl.h
*
* S390 version
*
* Derived from "include/asm-i386/fcntl.h"
*/
#ifndef _S390_FCNTL_H
#define _S390_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks
www.eeworm.com/read/172201/9719861
vhd seq_gen.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity seq_gen is
port(clk_seq : in std_logic;
rst_seq : in std_logic;
sync_out