代码搜索：strobe
找到约 441 项符合「strobe」的源代码
代码结果 441
www.eeworm.com/read/338666/12289229
asm lg_508a2.asm
LIST P=12C508A,R=HEX
;
; Retractable Landing Gear CONTROLLOR FOR R/C airccraft
; SUN, PU-NENG
; April/27/2004
;
; VERSION 2.0
; ADD Anti-Collision Strobe Light & Land
www.eeworm.com/read/148725/12433036
txt ddr_sdram_post_summary.txt
NOTE: Speed Grade c6 used for analysis
NOTE: Memory device can operate at 85.00 MHz with a lower CL than 2.5
DDR read data capture: DDR Data to DQS strobe edges at capture registers.
www.eeworm.com/read/249838/12467322
txt ddr_sdram_post_summary.txt
NOTE: Speed Grade c6 used for analysis
NOTE: Memory device can operate at 85.00 MHz with a lower CL than 2.5
DDR read data capture: DDR Data to DQS strobe edges at capture registers.
www.eeworm.com/read/172784/9690431
mak build_xl.mak
#
# sample NMAKE makefile to make libpli.dll for Cadence Verilog-XL, using VisualC++ on Windows
#
CDS_INST_DIR=c:/progra~1/cds
SOURCES = \
my_strobe_tf.c \
read_stimulus_
www.eeworm.com/read/271074/11009507
vhd strober.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.Constants.all;
entity Strober is
port (reset, clk : in std_logic;
strobe : in std_logic;
sample : in
www.eeworm.com/read/447445/7551012
h a3972.h
#ifndef _A3972_H_
#define _A3972_H_
sbit STROBE = P1^0;
sbit SCL = P1^1;
sbit SDA = P1^2;
/*****************************************************
函数名：Delay()
输入 ：unsigned char dat
www.eeworm.com/read/398898/7912191
vhd strober.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.Constants.all;
entity Strober is
port (reset, clk : in std_logic;
strobe : in std_logic;
sample : in
www.eeworm.com/read/373367/2762756
v setting_reg.v
module setting_reg
( input clock, input reset, input strobe, input wire [6:0] addr,
input wire [31:0] in, output reg [31:0] out, output reg changed);
parameter my_addr = 0;
always @(
www.eeworm.com/read/418944/10890818
txt ddr_tb1.txt
`timescale 1ns / 1ps
module ddr_tb;
`include "ddr_par.v"
wire sys_r_wn; // read/write#
wire sys_adsn; // address strobe
wire sys_dly
www.eeworm.com/read/373367/2762759
v setting_reg_masked.v
module setting_reg_masked
( input clock, input reset, input strobe, input wire [6:0] addr,
input wire [31:0] in, output reg [31:0] out, output reg changed);
/* upper 16 bits are mask, lower 16