代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/170176/9815439
vhd control_fsm_.vhd
-------------------------------------------------------------------------------
-- --
-- X X XXXXXX XXXXXX
www.eeworm.com/read/170175/9815529
vhd mux21w16.vhd
-- output of CoreGen module generator
-- $Header: mux2VHT.vhd,v 1.2 1998/06/15 17:57:53 tonyw Exp $
-- ************************************************************************
-- Copyright 1996-19
www.eeworm.com/read/170175/9815546
vhd mux4w16.vhd
-- output of CoreGen module generator
-- $Header: mux4VHT.vhd,v 1.2 1998/06/15 17:58:03 tonyw Exp $
-- ************************************************************************
-- Copyright 1996-19
www.eeworm.com/read/170129/9818099
vhd adder4.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/170110/9819939
vhd wishbone_i2c_master.vhd
--
-- WISHBONE revB2 compiant I2C master core
--
-- author: Richard Herveille
-- rev. 0.1 based on simple_i2c
-- rev. 0.2 april 27th 2001, fixed incomplete sensitivity list on assign_dato process (tha
www.eeworm.com/read/366183/9825979
vhd 53_counter.vhd
library IEEE;
use IEEE.std_logic_1164.all;
package mycntpkg is
component count port(clk,rst : in std_logic;
cnt : inout std_logic_vector(2 downto 0));
end component;
end mycntpkg;
www.eeworm.com/read/366055/9835646
vhd cnt10b.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt10b is
port(lock0,clr,clk,we:in std_logic;
dout:out std_logic_vector(8 downto 0);
clkout:out std_
www.eeworm.com/read/366055/9835867
vhd cnt10b.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt10b is
port(lock0,clr,clk,we:in std_logic;
dout:out std_logic_vector(8 downto 0);
clkout:out std_
www.eeworm.com/read/169560/9852315
vhd l_conversions_p.vhd
-- Altera Microperipheral Reference Design Version 0802
--------------------------------------------------------------------------------
-- File Name: l_conversions_p.vhd
-------------------------
www.eeworm.com/read/169299/9868737
vhd decode.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins