代码搜索:std

找到约 10,000 项符合「std」的源代码

代码结果 10,000
www.eeworm.com/read/228098/14400770

vhd shiftamountreg.vhd

--**************************************************************************************************** -- Shifter control register for ARM7TDMI-S processor -- Designed by Ruslan Lepetenok -- Modifi
www.eeworm.com/read/228098/14400775

vhd memoryremapper.vhd

--**************************************************************************************************** -- Memory remapper for ARM core simualtion -- Designed by Ruslan Lepetenok -- Modified 26.12.2
www.eeworm.com/read/228098/14400803

vhd abusmultiplexer.vhd

--**************************************************************************************************** -- A bus multiplexer for ARM7TDMI-S processor -- Designed by Ruslan Lepetenok -- Modified 04.1
www.eeworm.com/read/228098/14400811

vhd msscomppackage.vhd

-- ***************************************************************************************** -- Components for ARM memory subsystem (simulation) -- Designed by Ruslan Lepetenok -- Modified 02.02.20
www.eeworm.com/read/228098/14400816

vhd mulctrlandregs.vhd

--**************************************************************************************************** -- Multiplier control and Partial Sum/Carry registers for ARM core -- Designed by Ruslan Lepete
www.eeworm.com/read/228098/14400820

vhd multipliertestadder.vhd

--**************************************************************************************************** -- Adder for multiplier tester for ARM core -- Designed by Ruslan Lepetenok -- Modified 27.01.
www.eeworm.com/read/228098/14400827

vhd arm7tdmis_top.vhd

--**************************************************************************************************** -- Top entity for ARM7TDMI-S processor -- Designed by Ruslan Lepetenok -- Modified 12.02.2003
www.eeworm.com/read/228098/14400844

vhd multiplier.vhd

--**************************************************************************************************** -- Multiplier for ARM core -- Designed by Ruslan Lepetenok -- Modified 12.02.2003 --*********
www.eeworm.com/read/227807/14411503

vhd ad_7266_32.vhd

------------------------------------------------------------------------------ -- ad_7266_32.vhd - entity/architecture pair --------------------------------------------------------------------------
www.eeworm.com/read/126575/14416372

vhd and2.vhd

library IEEE; use IEEE.std_logic_1164.all; entity and2 is port ( c: out STD_LOGIC; a: in STD_LOGIC; b: in STD_LOGIC ); end and2; architecture and2_arch of