代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/270913/11020578
cmp mysin.cmp
-- Generated by NCO 2.3.1 [Altera, IP Toolbench v1.2.12 build21]
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
-- ******
www.eeworm.com/read/270530/11033631
vhd count.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity count is
port( --clk:in std_logic;
t1a: in std_logic;
start:in std_logic;
finish:out std_log
www.eeworm.com/read/270524/11034189
vhd count.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity count is
port( clk:in std_logic;
t1a: in std_logic;
start:in std_logic;
finish:out std_logic
www.eeworm.com/read/270506/11034444
vhd dds_vhdl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DDS_VHDL IS -- 顶层设计
PORT (
FOUT : OUT STD_LOGIC_VECTOR(7
www.eeworm.com/read/416290/11034677
vhd lcd.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity lcd is
Port ( clk : in std_logic; --3.125MHZ FROM div16 Module
www.eeworm.com/read/416057/11043031
vhd shiftamountreg.vhd
--****************************************************************************************************
-- Shifter control register for ARM7TDMI-S processor
-- Designed by Ruslan Lepetenok
-- Modifi
www.eeworm.com/read/416057/11043033
vhd memoryremapper.vhd
--****************************************************************************************************
-- Memory remapper for ARM core simualtion
-- Designed by Ruslan Lepetenok
-- Modified 26.12.2
www.eeworm.com/read/416057/11043052
vhd abusmultiplexer.vhd
--****************************************************************************************************
-- A bus multiplexer for ARM7TDMI-S processor
-- Designed by Ruslan Lepetenok
-- Modified 04.1
www.eeworm.com/read/416057/11043067
vhd msscomppackage.vhd
-- *****************************************************************************************
-- Components for ARM memory subsystem (simulation)
-- Designed by Ruslan Lepetenok
-- Modified 02.02.20
www.eeworm.com/read/416057/11043077
vhd mulctrlandregs.vhd
--****************************************************************************************************
-- Multiplier control and Partial Sum/Carry registers for ARM core
-- Designed by Ruslan Lepete