代码搜索：std

找到约 10,000 项符合「std」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/271723/10982858

vhd binary2bcd.vhd

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for ins
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www.eeworm.com/read/271723/10982902

vhd lcd.vhd

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for ins
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www.eeworm.com/read/417476/10988141

vhdl usb_new_usbvpb_top_str.vhdl

-------------------------------------------------------------------------------- -- -- P H I L I P S C O M P A N Y R E S T R I C T E D -- -- Copyright
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www.eeworm.com/read/417476/10988203

vhdl usb_new_usbpvci_ent.vhdl

-------------------------------------------------------------------------------- -- -- P H I L I P S C O M P A N Y R E S T R I C T E D -- -- Copyright
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www.eeworm.com/read/417397/10991786

txt 加法器源程序 .txt

------------------------------------------------------------------------ -- Single-bit adder ------------------------------------------------------------------------ library IEEE; use IEEE.std_log
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www.eeworm.com/read/417397/10991790

txt 相应加法器的测试向量（test bench).txt

-- download from: www.pld.com.cn & www.fpga.com.cn entity testbench is end; ------------------------------------------------------------------------ -- testbench for 8-bit adder ------------
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www.eeworm.com/read/417397/10991822

txt 加法器描述.txt

-- A Variety of Adder Styles -- download from: www.fpga.com.cn & www.pld.com.cn ------------------------------------------------------------------------ -- Single-bit adder -----------------------
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www.eeworm.com/read/271060/11010293

vhd txunit.vhd

--===========================================================================-- -- -- S Y N T H E Z I A B L E miniUART C O R E -- -- www.OpenCores.Org - January 2000 -- This core adheres
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www.eeworm.com/read/271060/11010300

vhd txunit.vhd

--===========================================================================-- -- -- S Y N T H E Z I A B L E miniUART C O R E -- -- www.OpenCores.Org - January 2000 -- This core adheres
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www.eeworm.com/read/416784/11013312

vhd clock.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all; entity clock is port( s0,s1:in std_logic; quickclk:in std_logic; slowclk:in std
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