代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/209602/15216772
vhd fen24.vhd
-------------------------------------------------
--实体名：fen24
--功 能：24进制计数器
--接 口：clk -时钟输入
-- qout1-个位BCD输出
-- qout2-十位BCD输出
-- carry-进位信号输出
-----------------------
www.eeworm.com/read/208551/15244583
cmp l4_sub.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/208551/15244589
cmp l1_add.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/208551/15244608
cmp l3_add.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/208551/15244611
cmp l1_sub.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/208551/15244629
cmp l2_mul.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/208551/15244635
cmp l3_sub.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/208551/15244637
cmp l4_add.cmp
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any
www.eeworm.com/read/206760/15290188
vhd cdu99.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity cdu99 is
port (
clk,reset:in std_logic;
count11:out std_logic_vec
www.eeworm.com/read/168634/5441302
vhd alub.vhd
-- ************************************************************************
-- * NOVAS SOFTWARE CONFIDENTIAL PROPRIETARY NOTE *
-- *