代码搜索：shift

找到约 10,000 项符合「shift」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/273897/10895509

txt shift.asm.txt

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www.eeworm.com/read/417873/10973116

bsf shift_register.bsf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
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www.eeworm.com/read/417873/10973488

vhd shift_register.vhd

-- 库声明 library IEEE; use IEEE.STD_LOGIC_1164.all; -- 实体声明 entity shift_register is -- 类属参数 generic ( TOTAL_BIT : integer := 10 ); -- 端口 port ( clk : in std_logic; reset_n : in std_lo
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www.eeworm.com/read/417505/10987308

vhd shift register.vhd

library ieee; use ieee.std_logic_1164.all; Entity ShiftReg is port( s,clk1:in std_logic; reset1:in std_logic; Q2:out std_logic_vector(3 downto 0)
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www.eeworm.com/read/468753/6987519

v shift_maker.v

// Written by Amit Pandey `define SHIFT_TYPE1 2'b00 `define SHIFT_TYPE2 2'b01 `define SHIFT_TYPE3 2'b10 `define SHIFT_TYPE4 2'b11 module shift_maker(ir2, Reg_value, SAM_Ctrl,BS_Shift_Amt,BS_Sh
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www.eeworm.com/read/468520/6992213

do shift7495.do

onerror {resume} quietly WaveActivateNextPane {} 0 add wave -noupdate -format Logic /shift7495/clk add wave -noupdate -format Logic /shift7495/cr add wave -noupdate -format Logic /shift7495/rin a
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www.eeworm.com/read/467642/7006597

class shift_action.class

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www.eeworm.com/read/467642/7006632

java shift_action.java

package java_cup; /** This class represents a shift action within the parse table. * The action simply stores the state that it shifts to and responds * to queries about its type. * * @versi
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www.eeworm.com/read/466825/7021064

vhd ram_shift.vhd

-- PARALLE IN PARALLEL OUT SHIFTER IN THE ADDRESS GENERATION UNIT. -- REQUIRED BECAUSE FFT IS COMPUTED ON DATA AND WRITTEN BACK INTO THE SAME -- LOCATION AFTER 5 CYCLES. SO THE READ ADDRESS IS SHIFT
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www.eeworm.com/read/466825/7021075

vhd shift2.vhd

-- SHIFT UNIT library ieee ; use ieee.std_logic_1164.all ; use work.butter_lib.all ; use ieee.std_logic_arith.all ; use ieee.std_logic_unsigned.all ; entity shift2 is port ( sub_contr
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