代码搜索:second

找到约 10,000 项符合「second」的源代码

代码结果 10,000
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mak second.mak

# Generated by the VisualDSP++ IDDE # Note: Any changes made to this Makefile will be lost the next time the # matching project file is loaded into the IDDE. If you wish to preserve # changes,
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ldf second.ldf

ARCHITECTURE(ADSP-21062) // // ADSP-21062 Memory Map: // ------------------------------------------------ // Internal memory 0x0000 0000 to 0x0007 ffff // -------------------------------
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asm second.asm

#define N 14 .segment/dm dm_data; .var input[N]="signal.dat"; .var mid[2*N]; .var output[N]; .endseg; .segment/pm pm_data; .var lowpass[N]=0x0037,0x0FD12,0x0408,0x0FE98,0x0FD22,0x029F,0x02C
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dpj second.dpj

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s second.s

#if 0 /* second.S - LILO second stage boot loader */ Copyright 1992-1998 Werner Almesberger. Copyright 1999-2005 John Coffman. All rights reserved. Licensed under the terms contained in the file 'C
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s second.s

#if 0 /* second.S - LILO second stage boot loader */ Copyright 1992-1998 Werner Almesberger. Copyright 1999-2005 John Coffman. All rights reserved. Licensed under the terms contained in the file 'C
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bsf second.bsf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
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vhd second.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity SECOND is port(clk,clr:in std_logic;----时钟/清零信号 sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位
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vwf second.vwf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
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v second.v

module second(clk,clr,pause,sl,sh,cn); input clk,clr,pause; output[3:0] sl,sh; output cn; reg[3:0] sl,sh; reg cn,clk_1; reg[30:0] rr; always @(posedge clk) begin if(rr==1000000) begi