代码搜索:practice

找到约 1,173 项符合「practice」的源代码

代码结果 1,173
www.eeworm.com/read/314805/13558777

drc alu.drc

WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net _n0011 is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the fl
www.eeworm.com/read/387906/6306865

txt cyglink.txt

F:\practice\Flash\ReadWriteFlash.obj TO F:\practice\Flash\ReadWriteFlash RS(256) PL(68) PW(78)
www.eeworm.com/read/481836/6631493

xmsgs map.xmsgs

www.eeworm.com/read/481836/6631494

xmsgs bitgen.xmsgs

www.eeworm.com/read/481836/6631514

bgn seg.bgn

Release 8.1i - Bitgen I.24 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Loading device for application Rf_Device from file '2v1000.nph' in environment D:\Xilinx. "seg" is an NCD, ver
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drc seg.drc

WARNING:PhysDesignRules:372 - Gated clock. Clock net minute10 is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-f
www.eeworm.com/read/156755/11776970

m set_z0.m

function Set_Z0(z0) % % this function sets a global variable Z0 which is % used for Smith Chart computations % % USAGE: Set_Z0(50) % | % +---- Sets characterist
www.eeworm.com/read/156755/11776974

m s_point.m

function s_Point(Z) % % This function plots a point on the Smith Chart % It is assume that global variable Z0 has % already been set (see Set_Z0) % % usage: s_Point(30+j*20) % % Copyright (
www.eeworm.com/read/155883/11840783

drc segment_scan_clock_24.drc

WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net _n0030 is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the fl
www.eeworm.com/read/154092/11989635

m set_z0.m

function Set_Z0(z0) % % this function sets a global variable Z0 which is % used for Smith Chart computations % % USAGE: Set_Z0(50) % | % +---- Sets characterist