代码搜索：opcode
找到约 2,963 项符合「opcode」的源代码
代码结果 2,963
www.eeworm.com/read/102935/6225137
c traps.c
/*
* arch/s390/kernel/traps.c
*
* S390 version
* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
*
www.eeworm.com/read/102935/6229207
c dsobject.c
/******************************************************************************
*
* Module Name: dsobject - Dispatcher object management routines
* $Revision: 91 $
*
****************
www.eeworm.com/read/410306/11293953
v machine.v
module machine(inc_pc,load_acc,load_pc,rd,wr,load_ir,datactl_ena,halt,clk1,zero,ena,opcode);
output inc_pc,load_pc,load_acc,rd,wr,load_ir;
output datactl_ena,halt;
input clk1,zero,ena;
www.eeworm.com/read/158146/11642026
v risc_cpu.v
//******************cpu.v*****************
module cpu(clk,rst,data_in,data_out,read,write,addr,halt);
output [15:0] data_out;
output [15:0] addr;
output read,write,halt;
input [15:0]data_in;
inp
www.eeworm.com/read/153764/12008493
cc mips.cc
//////////////////////////////////////////////////////////////////////////////
//
// mips.[h,cc] -- procedures for generating MIPS code
//
#include
#include
#include
#
www.eeworm.com/read/336262/12461350
v machine.v
//----------------------------------------------------------------------------
module machine( inc_pc, load_acc, load_pc, rd,wr, load_ir,
datactl_ena, halt, clk1, zero, ena, opcode );
output inc
www.eeworm.com/read/213391/15135712
v machine.v
//----------------------------------------------------------------------------
module machine( inc_pc, load_acc, load_pc, rd,wr, load_ir,
datactl_ena, halt, clk1, zero, ena, opcode );
output inc
www.eeworm.com/read/206514/15293969
v sm.v
// Copyright Model Technology, a Mentor Graphics
// Corporation company 2003, - All rights reserved.
/*******************************
* Sample solution: - Synthesizable RTL
* - Separate signals,
www.eeworm.com/read/166064/5476120
v machine.v
//----------------------------------------------------------------------------
module machine( inc_pc, load_acc, load_pc, rd,wr, load_ir,
datactl_ena, halt, clk1, zero, ena, opcode );
output inc
www.eeworm.com/read/158872/5590286
h gen-icache.h
/* The IGEN simulator generator for GDB, the GNU Debugger.
Copyright 2002 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
This file is part of GDB.
This program is free so