代码搜索：mult
找到约 6,230 项符合「mult」的源代码
代码结果 6,230
www.eeworm.com/read/458604/7293256
bsf mult.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/456603/7343831
v mult_for.v
module mult_for(outcome,a,b);
parameter size=8;
input[size:1] a,b;
output[2*size:1] outcome;
reg[2*size:1] outcome;
integer i;
always @(a or b)
begin
outcome=0;
for(i=1; i
www.eeworm.com/read/456603/7343927
v mult.v
module mult(outcome,a,b);
parameter size=8;
input[size:1] a,b;
output[2*size:1] outcome;
assign outcome=a*b;
endmodule
www.eeworm.com/read/451715/7457765
vhd mult.vhd
-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity mul
www.eeworm.com/read/450737/7477457
v mult.v
module mult(clock,clocken,reset,color,color_out);
parameter INSIZE=8;
parameter OUTSIZE=16;
parameter CST_MULT=66;
input clock,clocken,reset;
input [INSIZE-1:0] color;
output reg [OUTSIZE-1:0] color_o
www.eeworm.com/read/446179/7584375
vhd mult.vhd
-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity mul
www.eeworm.com/read/446179/7584398
vhd mult.vhd
-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity mul
www.eeworm.com/read/438642/7728757
cpp mult array .cpp
//对称矩阵相乘的程序代码
#include
#include
//数组结构类型的定义.h
const int n=3;
const int size=n*(n+1)/2;
typedef int datatype;
typedef struct{
datatype A[size],B[size],C[n][n];
}array;
v
www.eeworm.com/read/199676/7836434
gif mult.gif
www.eeworm.com/read/434253/7879273
v mult.v
module mult(outcome,a,b);
parameter size=8;
input[size:1] a,b;
output[2*size:1] outcome;
assign outcome=a*b;
endmodule