代码搜索:modelSim

找到约 1,834 项符合「modelSim」的源代码

代码结果 1,834
www.eeworm.com/read/18434/788836

xrf pll_ram_modelsim.xrf

vendor_name = ModelSim source_file = 1, pllx2.v source_file = 1, pll_ram.v source_file = 1, dpram8x32.v source_file = 1, c:/eda/quartus/libraries/megafunctions/altpll.tdf source_file = 1, c:/eda/
www.eeworm.com/read/18434/789430

xrf pll_ram_modelsim.xrf

vendor_name = ModelSim source_file = 1, pllx2.v source_file = 1, pll_ram.v source_file = 1, dpram8x32.v source_file = 1, c:/eda/quartus/libraries/megafunctions/altpll.tdf source_file = 1, c:/eda/
www.eeworm.com/read/18434/789448

enc_run_modelsim_vhdl

#!/bin/bash # This is a simple bash script to automate the process of running the # provided demo testbench with the IP functional simulation model # Ensure that modelsim is installed before runnin
www.eeworm.com/read/18434/789457

enc_run_modelsim_verilog

#!/bin/bash # This is a simple bash script to automate the process of running the # provided demo testbench with the IP functional simulation model # Ensure that modelsim is installed before runnin
www.eeworm.com/read/32279/882210

xrf scan_led_modelsim.xrf

vendor_name = ModelSim source_file = 1, D:/my_eda2/scan_led/scan_led.vwf source_file = 1, D:/my_eda2/scan_led/scan_led.vhd design_name = scan_led instance = comp, \clk~I\, clk, scan_led, 1 instan
www.eeworm.com/read/32279/884026

xrf bcd_decoder_modelsim.xrf

vendor_name = ModelSim source_file = 1, D:/my_eda/bcd_decoder/bcd_decoder.vhd source_file = 1, D:/my_eda/bcd_decoder/bcd_decoder.vwf design_name = bcd_decoder instance = port, i0, i[0], bcd_decode
www.eeworm.com/read/39267/1125228

xrf scan_led_modelsim.xrf

vendor_name = ModelSim source_file = 1, D:/my_eda2/scan_led/scan_led.vwf source_file = 1, D:/my_eda2/scan_led/scan_led.vhd design_name = scan_led instance = comp, \clk~I\, clk, scan_led, 1 instan
www.eeworm.com/read/39267/1127044

xrf bcd_decoder_modelsim.xrf

vendor_name = ModelSim source_file = 1, D:/my_eda/bcd_decoder/bcd_decoder.vhd source_file = 1, D:/my_eda/bcd_decoder/bcd_decoder.vwf design_name = bcd_decoder instance = port, i0, i[0], bcd_decode
www.eeworm.com/read/484109/1271920

xrf sram_test_modelsim.xrf

vendor_name = ModelSim source_file = 1, E:/Personal/BJ-EPM240学习板/BJ-EPM240V2 学习板刻盘资料/BJ-EPM240V2实验例程以及说明文档0318/BJ-EPM整板测试用代码/verilogsram/sram_test.v source_file = 1, E:/Personal/BJ-EPM240学习板/BJ-EPM2
www.eeworm.com/read/484108/1271930

sdo modelsim_test_v.sdo

// Copyright (C) 1991-2007 Altera Corporation // Your use of Altera Corporation's design tools, logic functions // and other software and tools, and its AMPP partner logic // functions, and any o