代码搜索：modelSim

找到约 1,834 项符合「modelSim」的源代码

代码结果 1,834
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/457784/1593252

xrf dds_modelsim.xrf

vendor_name = ModelSim source_file = 1, pllx.v source_file = 1, dds_adder.v source_file = 1, ddsromsin.v source_file = 1, ddsromcos.v source_file = 1, newdds.v source_file = 1, dds.vwf source_f
·
www.eeworm.com/read/457775/1593264

sav modelsim.ini.sav

[Library] others = $MODEL_TECH/../modelsim.ini fusion = F:/Libero/LIBERO~1.4/Designer/lib/modelsim/precompiled/vlog/fusion syncad_vhdl_lib = F:\Libero\LIBERO~1.4\Des
·
www.eeworm.com/read/457775/1593277

sav modelsim.ini.sav

[Library] others = $MODEL_TECH/../modelsim.ini fusion = F:/Libero/Libero_v8.4/Designer/lib/modelsim/precompiled/vlog/fusion syncad_vhdl_lib = F:\Libero\Libero_v8.4\Designer/lib/actel/syncad_vhdl_li
·
www.eeworm.com/read/456229/1606777

xrf ffti_modelsim.xrf

vendor_name = ModelSim source_file = 1, I:/fftinterface/ff.vhd source_file = 1, I:/fftinterface/ramdata.vhd source_file = 1, I:/fftinterface/ramwave.vhd source_file = 1, I:/fftinterface/TRANS.vhd
·
www.eeworm.com/read/456229/1606895

xrf ffti_modelsim.xrf

vendor_name = ModelSim source_file = 1, I:/fftinterface/ff.vhd source_file = 1, I:/fftinterface/ramdata.vhd source_file = 1, I:/fftinterface/ramwave.vhd source_file = 1, I:/fftinterface/TRANS.vhd
·
www.eeworm.com/read/237695/4621584

xrf colorbar_modelsim.xrf

vendor_name = ModelSim source_file = 1, E:/code/EP1C12/S6_VGA_change/src/vga_vl.v source_file = 1, E:/code/EP1C12/S6_VGA_change/Src/ColorBar.bdf source_file = 1, E:/code/EP1C12/S6_VGA_change/Proj/s
·
www.eeworm.com/read/237501/4627454

do top_modelsim.do

#///////////////////////////////////////////////////////////////////// #/// //// #/// top_modelsim.do
·
www.eeworm.com/read/213130/4929679

lib modelsim_work.lib

[PRIM_DFFE] A/PRIM_DFFE=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|31|1*897165 B/PRIM_DFFE=3*1744683 R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|31 [and1] A/and1=22|d:/quartus/bin/../
·
www.eeworm.com/read/179193/5309329

com run_modelsim.com

\rm -rf work vlib work vcom -work work child1.vhd vcom -work work child2.vhd vcom -work work child3.vhd vcom -work work master.vhd vcom -work work ../src/pred_fns.vhd vcom -work work ../src/packageCPU
·
www.eeworm.com/read/179193/5309354

com run_modelsim.com

vlib work vcom lib.vital vcom fsm_child1g.vhd vcom fsm_child2g.vhd vcom fsm_child3g.vhd vcom fsm_masterg.vhd vcom ../src/pred_fns.vhd vcom ../src/packageCPU.vhd vcom ../src/maprom.vhd vcom ../src/micr
·