代码搜索:modelSim

找到约 1,834 项符合「modelSim」的源代码

代码结果 1,834
www.eeworm.com/read/376260/2711742

do comp_acia.do

# # ModelSim Compiler 'DO' # # Build the miniUart support moduals vcom -93 -work WORK {../miniuart/acia/clkunit.vhd} vcom -93 -work WORK {../miniuart/acia/rxunit.vhd} vcom -93 -work WORK {../min
www.eeworm.com/read/376303/9321630

do comp_roms.do

# # ModelSim Compiler 'DO' # # Build the Altera LPM_ROM Wishbone wrapper model vcom -93 -work WORK {../roms/wb_lpm_rom.vhd} # Build the Wishbone External ROM wrapper vcom -93 -work WORK {../ro
www.eeworm.com/read/376302/9321639

do comp_rams.do

# # ModelSim Compiler 'DO' # # Build the Altera LPM_RAM Wishbone wrapper model vcom -93 -work WORK {../rams/wb_lpm_ram.vhd} # Build the Wishbone External RAM wrapper vcom -93 -work WORK {../ra
www.eeworm.com/read/371931/9529980

transcript

# Reading C:/Modeltech_6.3c/tcl/vsim/pref.tcl # // ModelSim SE 6.3c Sep 11 2007 # // # // Copyright 1991-2007 Mentor Graphics Corporation # // All Rights Reserved. # // # // TH
www.eeworm.com/read/160403/10535164

ldo lms.ldo

# Auto generated by Project Navigator for Modelsim vlib work vcom -93 -explicit cosfunc.vhd vcom -93 -explicit multiplier.vhd vcom -93 -explicit LMS.vhd ## You need to generate your own stim
www.eeworm.com/read/271060/11010340

do comp_roms.do

# # ModelSim Compiler 'DO' # # Build the Altera LPM_ROM Wishbone wrapper model vcom -93 -work WORK {../roms/wb_lpm_rom.vhd} # Build the Wishbone External ROM wrapper vcom -93 -work WORK {../ro
www.eeworm.com/read/271060/11010349

do comp_rams.do

# # ModelSim Compiler 'DO' # # Build the Altera LPM_RAM Wishbone wrapper model vcom -93 -work WORK {../rams/wb_lpm_ram.vhd} # Build the Wishbone External RAM wrapper vcom -93 -work WORK {../ra
www.eeworm.com/read/439412/7710173

v lfsr2_ver.v

// // Module: SRL_16_TAP1 // Design: 16 bit LFSR using a single instantiated SRL16Es (sequential version) // Verilog code: // // Simulation ModelSim EE v5.4c // // Description: Inferring SR
www.eeworm.com/read/403293/11519810

transcript

# Reading D:/Modeltech_6.3f/tcl/vsim/pref.tcl # // ModelSim SE 6.3f Feb 28 2008 # // # // Copyright 1991-2008 Mentor Graphics Corporation # // All Rights Reserved. # // # // TH
www.eeworm.com/read/257131/11948378

txt readme.txt

CPU86 - Free VHDL CPU8088 IP core Copyright (C) 2005-2006 HT-LAB Quick run: Open a DOSBox/Cygwin shell and navigate to the web_cpu88/Modelsim director