代码搜索:loopback

找到约 3,254 项符合「loopback」的源代码

代码结果 3,254
www.eeworm.com/read/190958/5170060

par loopback.par

Release 8.2.01i par I.32 Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved. XCOJEFFW30:: Wed Aug 16 11:34:33 2006 par -w loopback.ncd loopback loopback.pcf Constraints file: loopback.pcf
www.eeworm.com/read/190958/5170066

ut loopback.ut

-w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g PowerdownPin:Pull
www.eeworm.com/read/190958/5170096

ucf loopback.ucf

NET "clk" TNM_NET = "clk"; TIMESPEC "TS_clk" = PERIOD "clk" 10 ns HIGH 50 %; OFFSET = IN 6 ns BEFORE "clk" ; OFFSET = OUT 7.5 ns AFTER "clk" ; NET clk LOC=AJ15; Net rst LOC=AG5; net switches LOC
www.eeworm.com/read/190958/5170098

v loopback.v

// File: loopback.v // Date: 01/01/2005 // Name: Eric Crabill // // This is the top level design for the // EE178 Lab #4 assignment. // The `timescale directive specifies what // the simulation t
www.eeworm.com/read/190958/5170106

ut loopback.ut

-w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g PowerdownPin:Pull
www.eeworm.com/read/190958/5170108

vhd loopback.vhd

-------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 08:53:26 04/27/05 -- Design Name: -- Module Name: loopback - Beh
www.eeworm.com/read/190958/5170114

ucf loopback.ucf

NET "clk" TNM_NET = "clk"; TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50 %; OFFSET = IN 6 ns BEFORE "clk" ; OFFSET = OUT 7.5 ns AFTER "clk" ; #PACE: Start of Constraints generated by PACE #P
www.eeworm.com/read/190958/5170138

ut loopback.ut

-w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g PowerdownPin:Pull
www.eeworm.com/read/190958/5170143

vhd loopback.vhd

-------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 08:53:26 04/27/05 -- Design Name: -- Module Name: loopback - Beh
www.eeworm.com/read/190958/5170151

ucf loopback.ucf

NET "clk" TNM_NET = "clk"; TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50 %; OFFSET = IN 6 ns BEFORE "clk" ; OFFSET = OUT 7.5 ns AFTER "clk" ; #PACE: Start of Constraints generated by PACE #P