代码搜索：initial

找到约 10,000 项符合「initial」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
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spl initial1.spl

[Inputs] [Outputs] rx_read tx_write =tx_data[7:0]= [BiDir] [ATTRIBUTES] VeriModel initial1
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lso initial1.lso

work
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prj initial1.prj

verilog work "initial1.v"
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sym initial1.sym

VERSION 5 BEGIN SYMBOL initial1 SYMBOLTYPE BLOCK TIMESTAMP 2006 2 23 4 37 0 SYMATTR VeriModel "initial1" SYMPIN 384 -160 Output rx_read SYMPIN 384 -96 Output tx_write SYMPIN 384 -32 Output tx_d
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xst initial1.xst

set -tmpdir __projnav set -xsthdpdir ./xst run -ifn initial1.prj -ifmt mixed -ofn initial1 -ofmt NGC -p xc3s400-5-pq208 -top initial1 -opt_mode Speed -opt_level 1 -iuc NO -lso initial1.lso
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syr initial1.syr

Release 7.1.04i - xst H.42 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.00 / 3.46 s | Elapsed : 0.00 / 3.00 s --> Parameter xsthdpdir set
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v initial1.v

`timescale 1ns / 1ps //////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 17:55:14 02/22/06 // Design Name: // Mo
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dia transport_initial.dia

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m ga_initial.m

function ga_initial % GA_INITIAL Initialize the parameters for genetic operations. % Copyright (c) 1997-2000 Jiming Liu and Jianbing Wu global Fitness_Fun Bit_Length Population_Size Total_Genera
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plg poweron_initial.plg

礦ision2 Build Log Project: F:\有用资料\C51_table\第三章：开机后的启动流程\Poweron_initial.uv2 Project File Date: 07/08/2003 Output: compiling Poweron_initial.
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