代码搜索：gate
找到约 3,306 项符合「gate」的源代码
代码结果 3,306
www.eeworm.com/read/443386/1741891
makefile
#
# Makefile for the linux kernel.
#
extra-y := head.o init_task.o vmlinux.lds.s
obj-y := acpi.o entry.o efi.o efi_stub.o gate-data.o fsys.o ia64_ksyms.o irq.o irq_ia64.o \
irq_lsapic.o ivt.o mach
www.eeworm.com/read/393286/2476420
makefile
#
# Makefile for the linux kernel.
#
extra-y := head.o init_task.o vmlinux.lds
obj-y := acpi.o entry.o efi.o efi_stub.o gate-data.o fsys.o ia64_ksyms.o irq.o irq_ia64.o \
irq_lsapic.o ivt.o machve
www.eeworm.com/read/351002/3111820
ini express.ini
[files]
C:\BOOK\COMPON_4\COMPON_4\HA_COM.VHD=
C:\BOOK\COMPON_4\COMPON_4\COMPON_4.vhd=
C:\BOOK\COMPON_4\COMPON_4\OR_GATE.vhd=
[Modules]
48415f434f4d=c:\book\compon_4\compon_4\ha_com.vhd
434f4d5
www.eeworm.com/read/334325/12611350
makefile
include config.mak
LIBNAME = libaf.a
SRCS=af.c af_dummy.c af_delay.c af_channels.c af_format.c af_resample.c \
window.c filter.c af_volume.c af_equalizer.c af_tools.c af_comp.c af_gate.c \
af_pan.c
www.eeworm.com/read/430375/8753421
catal
fa_block C fablock_arch C
fb_block C fbblock_arch C
andgate C and_arch C
orgate C or_arch C
buffer0 C buf0_arch C
buffer1 C buf1_arch C
xorgate C xor_arch C
notgate C not_arch C
xor2gate C xor2_arch C
www.eeworm.com/read/167391/9970643
asm fantest.asm
T2CON EQU 0C8H ; SFR reg addr for T2 control word, TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2
T2MOD EQU 0C9H ; SFR reg addr for T2 setup word, GATE C/T M1 M
www.eeworm.com/read/141300/5770329
cir mesa14.cir
* MESA1 - DCFL GaAs MESFET Gate
* Taken from macspice3f4
*
* Removed: jsdf = 0 in modelcards
vdd 1 0 dc 3
vin 3 0 dc 0
z1 2 3 0 enha l=1u w=10u
z2 1 2 2 depl l=1u w=10u
.model enha nmf level=2 rd=3
www.eeworm.com/read/13015/268197
c 频率计.c
#include
unsigned char t=0,yichu=0,fenpin;
sbit B153=P2^0;
sbit A153=P2^1;
sbit GATE=P2^6;
sbit CLR=P2^7;
sbit P33=P3^3;
void t0(void)interrupt 1
{t++;
yichu=2; //定时器0溢出，y
www.eeworm.com/read/18805/802010
tdf tri.tdf
library ieee;
use ieee.std_logic_1164.all;
entity tri_gate is
port(a0,a1,a2,a3,a4,a5,a6,a7,:in std_logic;
en:in std_logic;
b0,b1,b2,b3,b4,b5,b6,b7:out std_logic;
www.eeworm.com/read/429114/8817848
sp p3-30.sp
*HSPICE SIMULATION FILE EX3-10
.OPTIONS POST=2 LIS
*common GATE ampilifier
.lib '.\Mm0355V.l' tt
M1 1 2 3 GND NCH W=60U L=2U
RG 2 GND 100K
RD VDD 1 4K
RS 4 VI 100
RL VO 2 4K
Cc1 3 4 100U
C