代码搜索:enabling
找到约 785 项符合「enabling」的源代码
代码结果 785
www.eeworm.com/read/322174/13387630
cpp ex257_oci7.cpp
#include
using namespace std;
#include
#define OTL_ORA7 // Compile OTL 4.0/OCI7
#if defined(_MSC_VER) // VC++
// Enabling support for 64-bit signed integers
// Since 64-
www.eeworm.com/read/403922/11499709
html pdostatement.closecursor.html
Closes the cursor, enabling the statement to be executed again.
www.eeworm.com/read/402770/11528304
cpp ex257_oci7.cpp
#include
using namespace std;
#include
#define OTL_ORA7 // Compile OTL 4.0/OCI7
#if defined(_MSC_VER) // VC++
// Enabling support for 64-bit signed integers
// Since 64-
www.eeworm.com/read/393485/8283377
cpp ex257_oci7.cpp
#include
using namespace std;
#include
#define OTL_ORA7 // Compile OTL 4.0/OCI7
#if defined(_MSC_VER) // VC++
// Enabling support for 64-bit signed integers
// Since 64-
www.eeworm.com/read/174072/9609249
cpp ex257_oci7.cpp
#include
using namespace std;
#include
#define OTL_ORA7 // Compile OTL 4.0/OCI7
#if defined(_MSC_VER) // VC++
// Enabling support for 64-bit signed integers
// Since 64-
www.eeworm.com/read/281949/4110618
inc init_ddr_mem1_x16cs0.inc
clearbreak
bexec 0x00000000
wait = on
reset
pause 2
setreg @CP15_CONTROL=0x00050078
// configuring CP15 for enabling the pripheral bus
setreg @CP15_PERIP_MEM_REMAP=0x40000015
; -----------
www.eeworm.com/read/281949/4110619
inc init_ddr_mem1_x32cs0.inc
clearbreak
bexec 0x00000000
wait = on
reset
pause 2
setreg @CP15_CONTROL=0x00050078
// configuring CP15 for enabling the pripheral bus
setreg @CP15_PERIP_MEM_REMAP=0x40000015
// ----------
www.eeworm.com/read/281949/4110620
inc init_ddr.inc
clearbreak
bexec 0x00000000
wait = on
reset
pause 2
setreg @CP15_CONTROL=0x00050078
// configuring CP15 for enabling the pripheral bus
setreg @CP15_PERIP_MEM_REMAP=0x40000015
; -----------
www.eeworm.com/read/240099/13237434
h 我的项目管理_app.h
* D:\代码\第一章\实例2 创建并管理项目\我的项目管理_APP.H
* This file is a generated, framework-enabling component
* created by APPBUILDER
* (c) Microsoft Corporation
* header file holding framework-generated p
www.eeworm.com/read/281949/4110615
inc init_sdr.inc
clearbreak
bexec 0x00000000
wait = on
reset
pause 1
setreg @CP15_CONTROL=0x00050078
// configuring CP15 for enabling the pripheral bus
setreg @CP15_PERIP_MEM_REMAP=0x40000015
// This start