init_ddr_mem1_x32cs0.inc

Redboot, boot-loader of Linux for Freescale ARM family.

clearbreak
bexec 0x00000000
wait = on
reset
pause 2

setreg @CP15_CONTROL=0x00050078
// configuring CP15 for enabling the pripheral bus
setreg @CP15_PERIP_MEM_REMAP=0x40000015

// --------------------------------------------------------------
//	Configure and enable MCU PLL for 399/133
// --------------------------------------------------------------
setmem /32 0x50050008 =0x60
setmem /32 0x5005001C =0x60

setmem /32 0x50050010 =0xFFFFFF97
setmem /32 0x50050024 =0xFFFFFF97

setmem /32 0x5005000C =0x68F
setmem /32 0x50050020 =0x68F

setmem /32 0x50058004 =0x836

setmem /32 0x5004400C =0x82C62B84

pause 1

setmem /32 0x50058044 =0x1220

setmem /32 0x50058040 =0x200140

setmem /32 0x50058000 =0x5540

setmem /32 0x50050000 =0x222

pause 1

setmem /32 0x5005803C =0x1


// --------------------------------------------------------------
//	Configure SDRAM Chip Select (CSD0)
// --------------------------------------------------------------
//	Initialize 32bit DDR SDRAM (cacheable region)
// --------------------------------------------------------------

// Configure ESDMISC, Set to DDR Mode 
setmem /32 0xB8001010 =0x00000004

pause 1 

// Configure CSD0 ESDCFG0
// XP=2 MRD=2 RAS=6 CAS=3 Clocks
setmem /32 0xB8001004 =0x00395728


//****************************************************
// The following sequence is required to startup SDRAM
// Do NOT modify or rearrange please
//****************************************************

// Configure SDRAM Operating mode to Precharge Command
// MODE=PRECHARGE ALL.
// PRECHARGE ALL (A10=1). 
// ROW/COL Muxing NOT used outside NORMAL Mode.

setmem /32 0xB8001000 =0x92210080
setmem /16 0x80000400 =0x0000

// Configure SDRAM Operating mode to Auto-Refresh Command
// AUTO REFRESH, AUTO REFRESH..

setmem /32 0xB8001000 =0xA2210080
setmem /16 0x80000000 =0x0000
setmem /16 0x80000000 =0x0000

// Configure SDRAM Operating mode to Load Mode Register Command
// MODE=LODE MODE REGISTER.
// Self Refresh Coverage = 4 Banks, Driver Strength = Full strength.  
//(Program MODE EXTENDED REGISTER, (BA1/A24=1).)

setmem /32 0xB8001000 =0xB2210080
setmem /8 0x80000033  =0x00
setmem /16 0x81000000 =0x0000

// Configure CSD0 ESDCTL0 and go into Normal Read/Write Mode
// 32-bit//  BL=8// row=13// col=9// MODE=Normal.
	// Dummy Write.

setmem /32 0xB8001000 =0x82216080
setmem /32 0x80000000 =0xC001C001


// --------------------------------------------------------
// End of DDR initialization through cacheable addresses
// --------------------------------------------------------

// --------------------------------------------------------------
// Initialize WEIM CS0 setup
// --------------------------------------------------------------

// Burst x32 Muxed MODE    

setmem /32 0xB8002000 =0x23524E80    

// Configure CS0 LCR

setmem /32 0xB8002004 =0xC0000E03   

// Configure CS0 ACR

setmem /32 0xB8002008 =0x0072BD00   

//   print "Putting Flash into Sync mode"
//   print "Write Flash Config Register"
setmem /32 0xA0000000 =0xF0F0F0F0   // Flash reset command. 
setmem /32 0xA0001554 =0xAAAAAAAA   // Write 1st command with address multiplied by 2. 
setmem /32 0xA0000AA8 =0x55555555   // Write 2nd command with address multiplied by 2. 
setmem /32 0xA0001554 =0xD0D0D0D0   // Write 3rd command with address multiplied by 2. 
setmem /32 0xA0001554 =0x56CA56CA   //  Write Config register  (4 waits, wrap, Burst=8). Burst Enabled "FOR WHEN FCE BROKE!!!" (Sync. Mode) AHB/BCLK=133/44.3MHz   (Optimal configuration)
setmem /32 0xA0000000 =0xF0F0F0F0   // Flash reset command.  ALWAYS keep this line in setup !!!!

//--------------------------------------------------------------
// CS4 setup
// --------------------------------------------------------------

// Configure CS4 UCR for EVB x16 CPLD and PSRAM for operation at 133MHz(lightly padded)

// Configure CS4 UCR
setmem /32 0xB8002040 =0x0000DCF6   

// Configure CS4 LCR
setmem /32 0xB8002044 =0x444A4541  

// Configure CS4 ACR
setmem /32 0xB8002048 =0x44443302   

// Set Drive Strength to High Settings
// ------------------------------------------------------------------------
// ---- Set Drive Strength on WEIM and SDRAM to High Drive Strength --------
// ----         SDRAM is controlled by groups 1 through 5
// ----         WEIM is controlled by groups 6 through 9
// ------------------------------------------------------------------------
//Configure Pad Groups 1 to High Drive Strength, set PKE & DDR_Input
setmem /16 0x50040200 =0x0092
		
//Configure Pad Groups 2 to High Drive Strength
setmem /16 0x50040202 =0x0002
		
//Configure Pad Groups 3 to High Drive Strength
setmem /16 0x50040204 =0x0002

//Configure Pad Groups 4 to High Drive Strength, set PKE & DDR_Input
setmem /16 0x50040206 =0x0092

//Configure Pad Groups 5 to High Drive Strength
setmem /16 0x50040208 =0x0002

//Configure Pad Groups 6 to High Drive Strength
setmem /16 0x5004020A =0x0002

//Configure Pad Groups 7 to High Drive Strength
setmem /16 0x5004020C =0x0002

//Configure Pad Groups 8 to High Drive Strength
setmem /16 0x5004020E =0x0002

//Configure Pad Groups 9 to High Drive Strength, set PKE
setmem /16 0x50040210 =0x0082

readfile,raw,gui "r:\tftp\mxc91131evbmem1_redboot.bin"=0x83F00000

setreg @R15=0x83F00000