代码搜索:do

找到约 10,000 项符合「do」的源代码

代码结果 10,000
www.eeworm.com/read/425249/10367201

do run.do

vlib ../simulation/postsynth vmap postsynth ../simulation/postsynth vcom -93 -explicit -work postsynth {C:/Actelprj/connect20090223/synthesis/connect.vhd} vcom -93 -explicit -work postsynth {C:/Act
www.eeworm.com/read/161772/10375859

c do.c

/* Demonstrates a simple do...while statement */ #include int get_menu_choice( void ); int main( void ) { int choice; choice = get_menu_choice(); printf("You cho
www.eeworm.com/read/353698/10431128

do_verilog

#!/bin/csh cp ../bitg/$1.imem arm7.imem cp ../bitg/$1.dmem arm7.dmem cp ../bitg/$1.dmemr arm7.dmemr cp ../bitg/$1.regsr arm7.regsr verilog testbench_arm7.v echo register comparison diff arm7.regout ar
www.eeworm.com/read/353393/10450916

do tb.do

######################################################################################### # # Disclaimer This software code and all associated documentation, comments or other # of Warranty:
www.eeworm.com/read/353067/10474618

do 7.do

bus diagonal fanout 5 route 50 clean 2 route 50 16 clean 2 route 50 16 clean 2 route 50 16 clean 2 filter 5 recorner diagonal status_file
www.eeworm.com/read/278578/10527368

gif do.gif

www.eeworm.com/read/278478/10533399

do wave.do

onerror {resume} quietly WaveActivateNextPane {} 0 add wave -noupdate -format Logic /UpDnCnt_tb/uu1/en add wave -noupdate -format Logic /UpDnCnt_tb/uu1/clr add wave -noupdate -format Logic /UpDnCn
www.eeworm.com/read/423555/10549715

do serial.do

vcom F:/FPGA/feng_rs0/serial.vhd vsim -t ps serial add wave * add wave tx1/* add wave rx1/* add wave fp/* force rstn 0 0,1 100ps force clk32 0 0,1 15.625 ps -r 31.250 ps force rxd 1 0,0 10 ns,1 114
www.eeworm.com/read/423400/10562722

aspx do.aspx

www.eeworm.com/read/278099/10572591

c do.c

/* +++Date last modified: 05-Jul-1997 */ /* ** DO.C - a simple facility for specifying multiple commands */ #include #include main(int argc, char *argv[]) { i